From patchwork Fri Nov 13 18:45:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 7613981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 41D14BF90C for ; Fri, 13 Nov 2015 19:03:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3E37F2054A for ; Fri, 13 Nov 2015 19:03:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 353F320549 for ; Fri, 13 Nov 2015 19:03:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZxJao-00068P-08; Fri, 13 Nov 2015 19:01:02 +0000 Received: from mail-pa0-x235.google.com ([2607:f8b0:400e:c03::235]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZxJN9-0006TV-EN for linux-arm-kernel@lists.infradead.org; Fri, 13 Nov 2015 18:47:05 +0000 Received: by pacej9 with SMTP id ej9so1001309pac.2 for ; Fri, 13 Nov 2015 10:46:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vNXwL1Vmvy6gRlkIM0ym8VMaudelNbiYK08V5ksvWu8=; b=aX0Rd3eVsMy98OYlehrYqYaywl432vwGavYnC6jpy6hFiZ1W8Ps6ntbkP06p4jU9s1 jd2ZG2dAC4KdHsSs4oluQZL6HoXzIBBAhiXnJN6uhJPO+Q5XsLEcq33zK5mgP/o2Vl7U 6RIMv9Uw8VAYnPyl5Llmc+LohX7IWCTplkalpJ2qbhNO1xu7yYsKEwG3rAHMQ0/zJ31j 46aWEMS3wZw1qoENvlFNJyWkxZkWE6KHE7RJI35ASop3a8sXObxSYTuGiJt+RNP9Lw+t 8e5Iuct8Yitf0Qt7rPslD9P1VbqxUyJJ5CvEFrSQkNoRGuywyTi4/vocaFAzyykr/Xz0 9w+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vNXwL1Vmvy6gRlkIM0ym8VMaudelNbiYK08V5ksvWu8=; b=NB5qgV7U3F31sxj7trhNEcDJV+GyDPuf1nsaH3DxwLtqoTlchMOEZbX0JDWs/K0oFF pgsrjkFAFo0fUxP8SUUFjPZ3vQOVhwJ567te/t7Ll5coY6X2X3bPszPHQPCMqUtyE/vy iVgg1AYxzTxsRZ7rdeviQNVhEG2ujIh9eqaDowRZ7+WUi1ofxe+8oMSIZMt4Qyy/mfDb TEGm2YL2wQAnbcKk4xuD6eQkhhwdcKYMtuphzVp9+e2nMzhAFn/IP9nbSzZFKfQ4tKaI sZSsaZM8UXGEXMwGxgeQLbp0K9AXj1OL40XEJapv1YwNH5/NYJlhpWvDUejbw2uL9ite 2b5g== X-Gm-Message-State: ALoCoQmwenDLPFvMDn6CUa3OT92eZ62jqvgsVAnqYT317auY3L35Wcg2Ix4ZenvjhaKHO/YYRnfG X-Received: by 10.66.218.170 with SMTP id ph10mr33630723pac.58.1447440398103; Fri, 13 Nov 2015 10:46:38 -0800 (PST) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [184.64.168.246]) by smtp.gmail.com with ESMTPSA id xi7sm21737967pbc.56.2015.11.13.10.46.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Nov 2015 10:46:37 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net, nicolas.pitre@linaro.org Subject: [PATCH V4 14/26] coresight: etm3x: adding perf_get/set_config() API Date: Fri, 13 Nov 2015 11:45:05 -0700 Message-Id: <1447440317-1977-15-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1447440317-1977-1-git-send-email-mathieu.poirier@linaro.org> References: <1447440317-1977-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151113_104655_913593_2D65D3B9 X-CRM114-Status: GOOD ( 20.66 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, mathieu.poirier@linaro.org, pawel.moll@arm.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, fainelli@broadcom.com, adrian.hunter@intel.com, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding a source operation to build a tracer's configuration from a perf_event. That way possibly complex parsing of the information conveyed by the event doesn't have to be carried out every time the configuration is needed. Since event configuration can change between concurrent sessions, the possibility of associating a tracer with a configuration is also provided. As such Perf can assign session configuration to tracers as it see fit. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/Kconfig | 1 + drivers/hwtracing/coresight/coresight-etm3x.c | 62 +++++++++++++++++++++++++++ include/linux/coresight.h | 7 ++- 3 files changed, 69 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index 6c8921140f02..e252dd1522e5 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -4,6 +4,7 @@ menuconfig CORESIGHT bool "CoreSight Tracing Support" select ARM_AMBA + select PERF_EVENTS help This framework provides a kernel interface for the CoreSight debug and trace drivers to register themselves with. It's intended to build diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index a83c67d13b21..dd319ef0f1ac 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include "coresight-etm.h" @@ -315,6 +316,40 @@ void etm_config_trace_mode(struct etm_drvdata *drvdata, config->addr_type[1] = ETM_ADDR_TYPE_RANGE; } +#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN) + +static int etm_parse_event_config(struct etm_drvdata *drvdata, + struct etm_config *config, + struct perf_event *event) +{ + u32 mode = 0; + u64 event_config = event->attr.config; + + if (event->attr.exclude_kernel) + mode = ETM_MODE_EXCL_KERN; + + if (event->attr.exclude_user) + mode = ETM_MODE_EXCL_USER; + + /* + * By default the tracers are configured to trace the whole address + * range. Narrow the field only if requested by user space. + */ + if (mode) + etm_config_trace_mode(drvdata, config, mode); + + /* + * At this time only cycle accurate and timestamp options are + * available. + */ + if (event_config & ~ETM3X_SUPPORTED_OPTIONS) + return -EINVAL; + + config->ctrl = event_config; + + return 0; +} + static void etm_enable_hw(void *info) { int i; @@ -428,6 +463,31 @@ static int etm_trace_id(struct coresight_device *csdev) return etm_get_trace_id(drvdata); } +static void *etm_get_config(struct coresight_device *csdev, + struct perf_event *event) +{ + struct etm_config *config = NULL; + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + config = kzalloc(sizeof(struct etm_config), GFP_KERNEL); + if (!config) + return config; + + etm_set_default(config); + + if (etm_parse_event_config(drvdata, config, event)) + return ERR_PTR(-EINVAL); + + return config; +} + +static void etm_set_config(struct coresight_device *csdev, void *config) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + drvdata->config = config; +} + static int etm_enable_sysfs(struct coresight_device *csdev) { struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -568,6 +628,8 @@ static void etm_disable(struct coresight_device *csdev) static const struct coresight_ops_source etm_source_ops = { .cpu_id = etm_cpu_id, .trace_id = etm_trace_id, + .get_config = etm_get_config, + .set_config = etm_set_config, .enable = etm_enable, .disable = etm_disable, }; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 61dfb8d511ea..f2148bc2bcfe 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -206,13 +206,18 @@ struct coresight_ops_link { * @cpu_id: returns the value of the CPU number this component * is associated to. * @trace_id: returns the value of the component's trace ID as known - to the HW. + * to the HW. + * @get_config: builds the ETM configuration after events' specifics. + * @set_config: associate a tracer with a configuration. * @enable: enables tracing for a source. * @disable: disables tracing for a source. */ struct coresight_ops_source { int (*cpu_id)(struct coresight_device *csdev); int (*trace_id)(struct coresight_device *csdev); + void *(*get_config)(struct coresight_device *csdev, + struct perf_event *event); + void (*set_config)(struct coresight_device *csdev, void *config); int (*enable)(struct coresight_device *csdev, u32 mode); void (*disable)(struct coresight_device *csdev); };