From patchwork Tue Nov 17 09:40:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 7634701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E00AA9F1C2 for ; Tue, 17 Nov 2015 09:56:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 012EB203EC for ; Tue, 17 Nov 2015 09:56:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 242C5202F8 for ; Tue, 17 Nov 2015 09:56:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZycxW-0000xr-BG; Tue, 17 Nov 2015 09:53:54 +0000 Received: from mail-wm0-x22f.google.com ([2a00:1450:400c:c09::22f]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zycmv-0005gr-DA for linux-arm-kernel@lists.infradead.org; Tue, 17 Nov 2015 09:43:04 +0000 Received: by wmww144 with SMTP id w144so145543023wmw.1 for ; Tue, 17 Nov 2015 01:42:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ecacBt5SiJuTwFHSbixfpZDBFRO4W51sMSiS4twwESY=; b=yIj8ujcaMfy12fOgxpl0v9Z7hJSz27TdatWrcqnXKFcICoIRStdOL/Et3s5zX8mmBe XxCUtJGuKtCC02OawpRhxXaK/mq003oEI3g3yKRO/sZOBWwAsX/RjmKyO2+YAG/dvy9h 76JgBUquh8kDoQ5rWl52AkVyHZTBRyWTskxTphrM3wl5jTo83Z/JvT+tQqiJCd0WwFGx 5vTMyWHsSyep56AyQ95ed1vCLw1Oc81aZYh/ZGy70HZ8tcxBwngKctZDFEiCpKbetL0j qJ8/6PplcY8xXzfRuXbdAsx9SgqeWVw+lRhwP1e/uf7bQXgjiss9rsfCooODWB398m89 F71Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ecacBt5SiJuTwFHSbixfpZDBFRO4W51sMSiS4twwESY=; b=e8Wmc5nIv54dAyBparAT712rxtYxZkCD7gDBHmuGOxvV34wFxpY7RNTX9VLx8sTmJV SZLQk6GtAf7LTmpKtH9bjZ2kPR+lxSebkXE9bQfPnou87ORDtRAca+jA5gE9RaG0uTgN IHy6rZKvyykPOMoS11hYHjYI4wwGE6w3ZMsG4XeI5v+U6GvqMBkkuLqWJFP/segAkp5u aIl88AnW2aR0p3nBYikZSnyTzFfz8JR51umj7IFbwiQas0XBdelihQsJfv6xxzFBQ6pv v+Vbp3xwkichrCLaNOz9a9vyhQP4u0lGeR1yXoUBo02V64xsizzF+/zgtDlBVkuzCx/n cYGQ== X-Gm-Message-State: ALoCoQn1wSyc4bM8hWZnJOdlN0LmVJ3QbIU78MJcSy43ib5uolLLQ0h8g8HI89dSeSfG/xNqi/Ll X-Received: by 10.194.189.133 with SMTP id gi5mr42502626wjc.13.1447753360375; Tue, 17 Nov 2015 01:42:40 -0800 (PST) Received: from localhost ([78.129.251.54]) by smtp.gmail.com with ESMTPSA id u139sm22913161wmu.22.2015.11.17.01.42.38 (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 17 Nov 2015 01:42:39 -0800 (PST) From: shannon.zhao@linaro.org To: ian.campbell@citrix.com, stefano.stabellini@citrix.com, keir@xen.org, jbeulich@suse.com, andrew.cooper3@citrix.com, julien.grall@citrix.com, xen-devel@lists.xen.org Subject: [PATCH v3 11/62] arm/acpi: Introduce ARM Boot Architecture Flags in FADT Date: Tue, 17 Nov 2015 17:40:10 +0800 Message-Id: <1447753261-7552-12-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1447753261-7552-1-git-send-email-shannon.zhao@linaro.org> References: <1447753261-7552-1-git-send-email-shannon.zhao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151117_014257_839862_F6849339 X-CRM114-Status: GOOD ( 14.01 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, hangaohuai@huawei.com, ard.biesheuvel@linaro.org, shannon.zhao@linaro.org, christoffer.dall@linaro.org, peter.huangpeng@huawei.com, david.vrabel@citrix.com, zhaoshenglong@huawei.com, linux-arm-kernel@lists.infradead.org, roger.pau@citrix.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shannon Zhao The Power State Coordination Interface (PSCI) defines an API that can be used to coordinate power control amongst the various supervisory systems concurrently running on a device. ACPI support for this technology would require the addition of two flags: PSCI_COMPLIANT and PSCI_USE_HVC. When set, the former signals to the OS that the hardware is PSCI compliant. The latter selects the appropriate conduit for PSCI calls by toggling between Hypervisor Calls (HVC) and Secure Monitor Calls (SMC). An ARM Boot Architecture Flags structure to support new ARM hardware was introduced in FADT in ACPI 5.1, add the code accordingly to implement that in ACPICA core. Since ACPI 5.1 doesn't support self defined PSCI function IDs, which means that only PSCI 0.2+ is supported in ACPI. Signed-off-by: Hanjun Guo Signed-off-by: Naresh Bhat Signed-off-by: Shannon Zhao Acked-by: Stefano Stabellini --- xen/include/acpi/actbl.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/xen/include/acpi/actbl.h b/xen/include/acpi/actbl.h index 856945d..66e29c3 100644 --- a/xen/include/acpi/actbl.h +++ b/xen/include/acpi/actbl.h @@ -244,7 +244,8 @@ struct acpi_table_fadt { u32 flags; /* Miscellaneous flag bits (see below for individual flags) */ struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */ u8 reset_value; /* Value to write to the reset_register port to reset the system */ - u8 reserved4[3]; /* Reserved, must be zero */ + u16 arm_boot_flags; /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */ + u8 minor_revision; /* FADT Minor Revision (ACPI 5.1) */ u64 Xfacs; /* 64-bit physical address of FACS */ u64 Xdsdt; /* 64-bit physical address of DSDT */ struct acpi_generic_address xpm1a_event_block; /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ @@ -259,7 +260,7 @@ struct acpi_table_fadt { struct acpi_generic_address sleep_status; /* 64-bit Sleep Status register */ }; -/* Masks for FADT Boot Architecture Flags (boot_flags) */ +/* Masks for FADT IA-PC Boot Architecture Flags (boot_flags) */ #define ACPI_FADT_LEGACY_DEVICES (1) /* 00: [V2] System has LPC or ISA bus devices */ #define ACPI_FADT_8042 (1<<1) /* 01: [V3] System has an 8042 controller on port 60/64 */ @@ -270,6 +271,11 @@ struct acpi_table_fadt { #define FADT2_REVISION_ID 3 +/* Masks for FADT ARM Boot Architecture Flags (arm_boot_flags) ACPI 5.1 */ + +#define ACPI_FADT_PSCI_COMPLIANT (1) /* 00: [V5+] PSCI 0.2+ is implemented */ +#define ACPI_FADT_PSCI_USE_HVC (1<<1) /* 01: [V5+] HVC must be used instead of SMC as the PSCI conduit */ + /* Masks for FADT flags */ #define ACPI_FADT_WBINVD (1) /* 00: [V1] The wbinvd instruction works properly */ @@ -345,7 +351,7 @@ enum acpi_prefered_pm_profiles { * FADT V5 size: 0x10C */ #define ACPI_FADT_V1_SIZE (u32) (ACPI_FADT_OFFSET (flags) + 4) -#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (reserved4[0]) + 3) +#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (minor_revision) + 1) #define ACPI_FADT_V3_SIZE (u32) (ACPI_FADT_OFFSET (sleep_control)) #define ACPI_FADT_V5_SIZE (u32) (sizeof (struct acpi_table_fadt))