From patchwork Tue Nov 17 09:40:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 7634861 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E26CBBF90C for ; Tue, 17 Nov 2015 09:58:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F2191204D5 for ; Tue, 17 Nov 2015 09:58:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD514204D6 for ; Tue, 17 Nov 2015 09:58:54 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zyd04-0004b5-8u; Tue, 17 Nov 2015 09:56:32 +0000 Received: from mail-wm0-x236.google.com ([2a00:1450:400c:c09::236]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zycod-00076Y-4T for linux-arm-kernel@lists.infradead.org; Tue, 17 Nov 2015 09:44:51 +0000 Received: by wmvv187 with SMTP id v187so217801318wmv.1 for ; Tue, 17 Nov 2015 01:44:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0Gz4thGVVVvCsUEVvMNjI/mQC6/7L7ePi7av8IfM3Bc=; b=jIHvCwUo2EGq3C8UAQh+xrgW9tKMNgdSQDOk0SO/Vq0xKPgYYuy9BikvqRBVYu+i4A bo3at0xjREMizz7kTQu/ivzLS9H5C52WtqI7U++Ntsrr3pDuohA4NuMUAAs8Sp1+s9+K J1knqA152d6PfNMXqpSeXuZnOEfuwve9/UjuZ2erXPJZy4MC3tcYsn5osS4bzbTJrnis 6cG0KWD+O6yzt187BpQHr0g6kPbJ8BHwDkoBQigh6LrNloYLhix55gpgo6DmgS83xSqa 9a/rfHWq12KUkQz+Brg6Ew7HwrFnI3pVJNqrpU5YpG5kn6TYyO07n9xLKY5/xKn/y39I +r2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0Gz4thGVVVvCsUEVvMNjI/mQC6/7L7ePi7av8IfM3Bc=; b=QEYNkSBs5MWyvSfeB/dqkz3QfF64/AOBIb21VhtNPTmvHEXqBWVjbBd0ypB5OvfWDw cR5oqJACQx5PP8IfCL1dD5PqVuQbCeNE0XMUQdMghHGl4wlmSHoqEKGweCWJjwHTPbD4 rc6/e0dNFrbGv5674WsMQQNhcKRs0iOpi6BFHg7mMIIgYn6UfVtcZ0WUOaH/+DPQP4VR p/lFliuWdynIxp7BxYv0mkAGJ8dA18lkpI4g6n0zORdfbgmLE0HdoQcpd82ihCBdk+RP yvPsVKClUB9B9lbiqQILFxPcymsvs0PzwYCkZiicvKLH5bw/choNUBSVSX8Tgg/Mc6DC swwg== X-Gm-Message-State: ALoCoQkH3aSs0UynF70FDw3l5Jo7B9p3SELw5K2T5vTVFhYrUhh5cMNIjstr1xs3U1yBSuZlhISF X-Received: by 10.194.90.50 with SMTP id bt18mr14121500wjb.118.1447753461140; Tue, 17 Nov 2015 01:44:21 -0800 (PST) Received: from localhost ([78.129.251.54]) by smtp.gmail.com with ESMTPSA id i18sm23031314wmf.6.2015.11.17.01.44.18 (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 17 Nov 2015 01:44:20 -0800 (PST) From: shannon.zhao@linaro.org To: ian.campbell@citrix.com, stefano.stabellini@citrix.com, keir@xen.org, jbeulich@suse.com, andrew.cooper3@citrix.com, julien.grall@citrix.com, xen-devel@lists.xen.org Subject: [PATCH v3 22/62] arm/gic-v3: Refactor gicv3_init into generic and dt specific parts Date: Tue, 17 Nov 2015 17:40:21 +0800 Message-Id: <1447753261-7552-23-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1447753261-7552-1-git-send-email-shannon.zhao@linaro.org> References: <1447753261-7552-1-git-send-email-shannon.zhao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151117_014443_624209_4BDCB1AF X-CRM114-Status: GOOD ( 16.78 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, hangaohuai@huawei.com, ard.biesheuvel@linaro.org, shannon.zhao@linaro.org, christoffer.dall@linaro.org, peter.huangpeng@huawei.com, david.vrabel@citrix.com, zhaoshenglong@huawei.com, linux-arm-kernel@lists.infradead.org, roger.pau@citrix.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shannon Zhao Refactor gic-v3 related functions into dt and generic parts. This will be helpful when adding acpi support for gic-v3. Signed-off-by: Shannon Zhao --- xen/arch/arm/gic-v3.c | 95 +++++++++++++++++++++++++++------------------------ 1 file changed, 51 insertions(+), 44 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 4fe0c37..bd13010 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1138,62 +1138,27 @@ static int __init cmp_rdist(const void *a, const void *b) return ( l->base < r->base) ? -1 : 0; } +static paddr_t __initdata dbase = 0, cbase = 0, csize = 0, vbase = 0; + /* If the GICv3 supports GICv2, initialize it */ -static void __init gicv3_init_v2(const struct dt_device_node *node, - paddr_t dbase) +static void __init gicv3_init_v2(void) { - int res; - paddr_t cbase, csize; - paddr_t vbase, vsize; - - /* - * For GICv3 supporting GICv2, GICC and GICV base address will be - * provided. - */ - res = dt_device_get_address(node, 1 + gicv3.rdist_count, - &cbase, &csize); - if ( res ) + if ( cbase == 0 || vbase == 0 ) return; - res = dt_device_get_address(node, 1 + gicv3.rdist_count + 2, - &vbase, &vsize); - if ( res ) - return; - - /* - * We emulate a vGICv2 using a GIC CPU interface of GUEST_GICC_SIZE. - * So only support GICv2 on GICv3 when the virtual CPU interface is - * at least GUEST_GICC_SIZE. - */ - if ( vsize < GUEST_GICC_SIZE ) - { - printk(XENLOG_WARNING - "GICv3: WARNING: Not enabling support for GICv2 compat mode.\n" - "Size of GICV (%#"PRIpaddr") must at least be %#llx.\n", - vsize, GUEST_GICC_SIZE); - return; - } - printk("GICv3 compatible with GICv2 cbase %#"PRIpaddr" vbase %#"PRIpaddr"\n", cbase, vbase); vgic_v2_setup_hw(dbase, cbase, csize, vbase, 0); } -/* Set up the GIC */ -static int __init gicv3_init(void) +static void __init dt_gicv3_init(void) { struct rdist_region *rdist_regs; int res, i; uint32_t reg; const struct dt_device_node *node = gicv3_info.node; - paddr_t dbase; - - if ( !cpu_has_gicv3 ) - { - dprintk(XENLOG_ERR, "GICv3: driver requires system register support\n"); - return -ENODEV; - } + paddr_t vsize; res = dt_device_get_address(node, 0, &dbase, NULL); if ( res ) @@ -1248,6 +1213,48 @@ static int __init gicv3_init(void) panic("GICv3: Cannot find the maintenance IRQ"); gicv3_info.maintenance_irq = res; + /* + * For GICv3 supporting GICv2, GICC and GICV base address will be + * provided. + */ + res = dt_device_get_address(node, 1 + gicv3.rdist_count, + &cbase, &csize); + if ( res ) + return; + + res = dt_device_get_address(node, 1 + gicv3.rdist_count + 2, + &vbase, &vsize); + if ( res ) + return; + + /* + * We emulate a vGICv2 using a GIC CPU interface of GUEST_GICC_SIZE. + * So only support GICv2 on GICv3 when the virtual CPU interface is + * at least GUEST_GICC_SIZE. + */ + if ( vsize < GUEST_GICC_SIZE ) + { + printk(XENLOG_WARNING + "GICv3: WARNING: Not enabling support for GICv2 compat mode.\n" + "Size of GICV (%#"PRIpaddr") must at least be %#llx.\n", + vsize, GUEST_GICC_SIZE); + return; + } +} + +/* Set up the GIC */ +static int __init gicv3_init(void) +{ + int res, i; + + if ( !cpu_has_gicv3 ) + { + dprintk(XENLOG_ERR, "GICv3: driver requires system register support\n"); + return -ENODEV; + } + + dt_gicv3_init(); + for ( i = 0; i < gicv3.rdist_count; i++ ) { /* map dbase & rdist regions */ @@ -1277,7 +1284,7 @@ static int __init gicv3_init(void) vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, gicv3.rdist_stride); - gicv3_init_v2(node, dbase); + gicv3_init_v2(); spin_lock_init(&gicv3.lock); @@ -1317,7 +1324,7 @@ static const struct gic_hw_operations gicv3_ops = { .make_hwdom_dt_node = gicv3_make_hwdom_dt_node, }; -static int __init gicv3_preinit(struct dt_device_node *node, const void *data) +static int __init dt_gicv3_preinit(struct dt_device_node *node, const void *data) { gicv3_info.hw_version = GIC_V3; gicv3_info.node = node; @@ -1335,7 +1342,7 @@ static const struct dt_device_match gicv3_dt_match[] __initconst = DT_DEVICE_START(gicv3, "GICv3", DEVICE_GIC) .dt_match = gicv3_dt_match, - .init = gicv3_preinit, + .init = dt_gicv3_preinit, DT_DEVICE_END /*