From patchwork Tue Nov 17 09:40:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 7635011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 798BBBF90C for ; Tue, 17 Nov 2015 10:08:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 99C0D204D6 for ; Tue, 17 Nov 2015 10:08:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B4BBC20498 for ; Tue, 17 Nov 2015 10:08:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zyd9j-000878-Fk; Tue, 17 Nov 2015 10:06:31 +0000 Received: from mail-wm0-x22a.google.com ([2a00:1450:400c:c09::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zycq5-0001K3-27 for linux-arm-kernel@lists.infradead.org; Tue, 17 Nov 2015 09:46:20 +0000 Received: by wmvv187 with SMTP id v187so217865420wmv.1 for ; Tue, 17 Nov 2015 01:45:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=J4hthvoCe6YUSjH3XS87OqfmwkyU27mEeJxat0ZiukA=; b=oEpH40YMdWboCnus0JVMvq9sgWgbXmDaY0ZpOIrTgD3epS0b1y4uDx02MqIKn0pFlM N+pgpDdF+eDXUqszpB72mpL0BdvmYa82BbFRJVmNzqPbLtkdV/U4Ooh6mxF5y15kNhk5 73nsoV0JFbASkL78k+I10fgqEFq2FGpnLGC5EgToM5mtUsmQgRt2hFKB0SZMOxL+GOZd rNN4W9cPmZAqApF4/Jwx5hbFR3gopuOXouGn+q0yL5lmvR1ACUdWd1hO37vjPRyOnJ0N Wj+fup7y4dPBPnOARQfi22AjCK6kWU9oE8+BAEm2LqFUnNbnKHQKvlZn3VFpaMq0cKRG Ixxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=J4hthvoCe6YUSjH3XS87OqfmwkyU27mEeJxat0ZiukA=; b=CT6Mucm44QWq3l54LbOw0XgYrOw1JxLAOqg5sYMt1tgfaq4ckKwsEBHrfqIaZSJHHg qlpa6dYXv11iOOetVmbVdxe5MB6KrZaYXLc3v77UT9PKboPSYXs8SbWmVyelpl/a68cX acTPypDanWjI6oXiwB56BkUrQPaKz5fNsbfTcpOgzLH0y1D+F6gzVOKzm3doPjsA8Jlj 5sjx7dMVogH4dA5jmi2NZnU9ZqhrfoLqnTuwj2fmKJgUQSRDkG2ETKW5DWJviFueBfF2 7QvYdsndZniGS7oWoN4LZT7cfoqA1f2YUKPoML5c1UBxcxcvuKU5rILroB/Ua3XMWr/Y 5eiw== X-Gm-Message-State: ALoCoQn/HoXWrC4IcduEHQiaRa1jNSH82KuzWOBeMCF16Ig0g9kJTxc3+8sgvKbPrxMh6ZDW6fpG X-Received: by 10.28.47.212 with SMTP id v203mr1403538wmv.37.1447753551516; Tue, 17 Nov 2015 01:45:51 -0800 (PST) Received: from localhost ([78.129.251.54]) by smtp.gmail.com with ESMTPSA id m11sm23014018wma.5.2015.11.17.01.45.48 (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 17 Nov 2015 01:45:50 -0800 (PST) From: shannon.zhao@linaro.org To: ian.campbell@citrix.com, stefano.stabellini@citrix.com, keir@xen.org, jbeulich@suse.com, andrew.cooper3@citrix.com, julien.grall@citrix.com, xen-devel@lists.xen.org Subject: [PATCH v3 32/62] arm/acpi: Parse GTDT to initialize timer Date: Tue, 17 Nov 2015 17:40:31 +0800 Message-Id: <1447753261-7552-33-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1447753261-7552-1-git-send-email-shannon.zhao@linaro.org> References: <1447753261-7552-1-git-send-email-shannon.zhao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151117_014613_882669_DC91CF1C X-CRM114-Status: GOOD ( 14.62 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, hangaohuai@huawei.com, ard.biesheuvel@linaro.org, shannon.zhao@linaro.org, christoffer.dall@linaro.org, peter.huangpeng@huawei.com, david.vrabel@citrix.com, zhaoshenglong@huawei.com, linux-arm-kernel@lists.infradead.org, roger.pau@citrix.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Parth Dixit Parse GTDT (Generic Timer Descriptor Table) to initialize timer. Using the information presented by GTDT to initialize the arch timer (not memory-mapped). Signed-off-by: Naresh Bhat Signed-off-by: Parth Dixit Signed-off-by: Shannon Zhao --- xen/arch/arm/time.c | 73 +++++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 62 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 5ded30c..adbfc2a 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -65,8 +66,45 @@ unsigned int timer_get_irq(enum timer_ppi ppi) static __initdata struct dt_device_node *timer; +#ifdef CONFIG_ACPI +/* Initialize per-processor generic timer */ +static int __init arch_timer_acpi_init(struct acpi_table_header *table) +{ + unsigned int irq_type; + struct acpi_table_gtdt *gtdt; + + gtdt = container_of(table, struct acpi_table_gtdt, header); + + /* Initialize all the generic timer IRQ variable from GTDT table */ + irq_type = acpi_get_irq_type(gtdt->non_secure_el1_flags); + irq_set_type(gtdt->non_secure_el1_interrupt, irq_type); + timer_irq[TIMER_PHYS_NONSECURE_PPI] = gtdt->non_secure_el1_interrupt; + + irq_type = acpi_get_irq_type(gtdt->secure_el1_flags); + irq_set_type(gtdt->secure_el1_interrupt, irq_type); + timer_irq[TIMER_PHYS_SECURE_PPI] = gtdt->secure_el1_interrupt; + + irq_type = acpi_get_irq_type(gtdt->virtual_timer_flags); + irq_set_type(gtdt->virtual_timer_interrupt, irq_type); + timer_irq[TIMER_VIRT_PPI] = gtdt->virtual_timer_interrupt; + + irq_type = acpi_get_irq_type(gtdt->non_secure_el2_flags); + irq_set_type(gtdt->non_secure_el2_interrupt, irq_type); + timer_irq[TIMER_HYP_PPI] = gtdt->non_secure_el2_interrupt; + + return 0; +} + +void __init acpi_preinit_xen_time(void) +{ + acpi_table_parse(ACPI_SIG_GTDT, arch_timer_acpi_init); +} +#else +static inline void acpi_preinit_xen_time(void) { } +#endif + /* Set up the timer on the boot CPU (early init function) */ -void __init preinit_xen_time(void) +static void __init dt_preinit_xen_time(void) { static const struct dt_device_match timer_ids[] __initconst = { @@ -74,7 +112,6 @@ void __init preinit_xen_time(void) { /* sentinel */ }, }; int res; - u32 rate; timer = dt_find_matching_node(NULL, timer_ids); if ( !timer ) @@ -86,8 +123,19 @@ void __init preinit_xen_time(void) if ( res ) panic("Timer: Cannot initialize platform timer"); - res = dt_property_read_u32(timer, "clock-frequency", &rate); - if ( res ) +} + +void __init preinit_xen_time(void) +{ + u32 rate; + + /* Initialize all the generic timers presented in GTDT */ + if ( acpi_disabled ) + dt_preinit_xen_time(); + else + acpi_preinit_xen_time(); + + if( acpi_disabled && dt_property_read_u32(timer, "clock-frequency", &rate) ) { cpu_khz = rate / 1000; timer_dt_clock_frequency = rate; @@ -104,14 +152,17 @@ int __init init_xen_time(void) int res; unsigned int i; - /* Retrieve all IRQs for the timer */ - for ( i = TIMER_PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++ ) + if( acpi_disabled ) { - res = platform_get_irq(timer, i); - - if ( res < 0 ) - panic("Timer: Unable to retrieve IRQ %u from the device tree", i); - timer_irq[i] = res; + /* Retrieve all IRQs for the timer */ + for ( i = TIMER_PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++ ) + { + res = platform_get_irq(timer, i); + + if ( res < 0 ) + panic("Timer: Unable to retrieve IRQ %u from the device tree", i); + timer_irq[i] = res; + } } /* Check that this CPU supports the Generic Timer interface */