| Message ID | 1447753261-7552-5-git-send-email-shannon.zhao@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tuesday 17 November 2015 17:40:03 shannon.zhao@linaro.org wrote: > +/* > + * Emulate x86 io ports for arm. > + */ > +#define __armio(addr) ( (void __iomem *)addr ) > + > +#define inb(c) ( readb( __armio(c) ) ) > +#define inw(c) ( readw( __armio(c) ) ) > +#define inl(c) ( readl( __armio(c) ) ) > + > +#define outb(v, c) ( writeb(v, __armio(c) ) ) > +#define outw(v, c) ( writew(v, __armio(c) ) ) > +#define outl(v, c) ( writel(v, __armio(c) ) ) > + This is almost certainly wrong. There might be I/O port accesses, but they won't be in the same place as normal pointers. Arnd
Hi Arnd, On 2015/11/17 17:50, Arnd Bergmann wrote: > On Tuesday 17 November 2015 17:40:03 shannon.zhao@linaro.org wrote: >> +/* >> + * Emulate x86 io ports for arm. >> + */ >> +#define __armio(addr) ( (void __iomem *)addr ) >> + >> +#define inb(c) ( readb( __armio(c) ) ) >> +#define inw(c) ( readw( __armio(c) ) ) >> +#define inl(c) ( readl( __armio(c) ) ) >> + >> +#define outb(v, c) ( writeb(v, __armio(c) ) ) >> +#define outw(v, c) ( writew(v, __armio(c) ) ) >> +#define outl(v, c) ( writel(v, __armio(c) ) ) >> + > > This is almost certainly wrong. There might be I/O port accesses, but they > won't be in the same place as normal pointers. > Sorry, maybe I didn't get what you mean. Here it just wants emulate the in(b,w,l) and out(b,w,l) which exist on x86 while not on ARM. So it could introduce less change to the common ACPI codes, for example acpi_os_write_port(). I see there is the same thing in Linux arch/arm/include/asm/io.h Thanks,
On Wednesday 18 November 2015 15:01:26 Shannon Zhao wrote: > Hi Arnd, > > On 2015/11/17 17:50, Arnd Bergmann wrote: > > On Tuesday 17 November 2015 17:40:03 shannon.zhao@linaro.org wrote: > >> +/* > >> + * Emulate x86 io ports for arm. > >> + */ > >> +#define __armio(addr) ( (void __iomem *)addr ) > >> + > >> +#define inb(c) ( readb( __armio(c) ) ) > >> +#define inw(c) ( readw( __armio(c) ) ) > >> +#define inl(c) ( readl( __armio(c) ) ) > >> + > >> +#define outb(v, c) ( writeb(v, __armio(c) ) ) > >> +#define outw(v, c) ( writew(v, __armio(c) ) ) > >> +#define outl(v, c) ( writel(v, __armio(c) ) ) > >> + > > > > This is almost certainly wrong. There might be I/O port accesses, but they > > won't be in the same place as normal pointers. > > > Sorry, maybe I didn't get what you mean. Here it just wants emulate the > in(b,w,l) and out(b,w,l) which exist on x86 while not on ARM. So it > could introduce less change to the common ACPI codes, for example > acpi_os_write_port(). > > I see there is the same thing in Linux arch/arm/include/asm/io.h The problem is that your definition of __armio() is wrong. If you want to do it right, you need to first find the PCI I/O port ranges and map them into a virtual address, and then define __armio() in a way to add the virtual address you have mapped them to. Alternatively, define the functions so they don't try to access the pointers but instead just print a warning. Arnd
diff --git a/xen/include/asm-arm/arm64/io.h b/xen/include/asm-arm/arm64/io.h index 37abc47..7ad9b65 100644 --- a/xen/include/asm-arm/arm64/io.h +++ b/xen/include/asm-arm/arm64/io.h @@ -20,6 +20,7 @@ #ifndef _ARM_ARM64_IO_H #define _ARM_ARM64_IO_H +#include <asm/system.h> #include <asm/byteorder.h> /* @@ -109,4 +110,17 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) +/* + * Emulate x86 io ports for arm. + */ +#define __armio(addr) ( (void __iomem *)addr ) + +#define inb(c) ( readb( __armio(c) ) ) +#define inw(c) ( readw( __armio(c) ) ) +#define inl(c) ( readl( __armio(c) ) ) + +#define outb(v, c) ( writeb(v, __armio(c) ) ) +#define outw(v, c) ( writew(v, __armio(c) ) ) +#define outl(v, c) ( writel(v, __armio(c) ) ) + #endif /* _ARM_ARM64_IO_H */