From patchwork Tue Nov 17 14:56:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 7637781 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1D404BF90C for ; Tue, 17 Nov 2015 14:59:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3C1C9205AA for ; Tue, 17 Nov 2015 14:59:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C2A4C2057E for ; Tue, 17 Nov 2015 14:59:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZyhhY-0002ss-SW; Tue, 17 Nov 2015 14:57:44 +0000 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZyhhA-0002lg-Lo for linux-arm-kernel@lists.infradead.org; Tue, 17 Nov 2015 14:57:21 +0000 Received: by wmeo63 with SMTP id o63so5618571wme.2 for ; Tue, 17 Nov 2015 06:57:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=9iIMTFZG0GpPw+CAkrxt7p6wcA+fGENhlLV6gP+ZlA8=; b=S3SkcegJa9ZsHQfgFdSajYupFgnOyiMQJc9UVB8wqLmQQho6j3sBT2Xec9/DoIJ3J8 +S2BPa3o/u4AjJ+mhpyz4qg5/gkNmC1OZrrpQgZ3eKoeSS2I3QnAvvwDErlXj2UUn0iL H6uZgnh8vZSqdz7C8AeRZc2c4tV1w8u2WtzpEaTG82XaSFW7SDIBTbsU7MOGDXp15py4 bao7i/qwz1Ag8TKuGtWVmUU+xXnE2MseRapgDuw7XyRVqJ1FzgySIPd0MbVSN1cVjQkf c2rNQRfRLe75uuNqs00Q387+An4gGCrwzacOAja1Zc9ftAC/WFWumgiJacFP5ROoM2Zs Viow== X-Received: by 10.28.217.6 with SMTP id q6mr3454750wmg.5.1447772222243; Tue, 17 Nov 2015 06:57:02 -0800 (PST) Received: from localhost.localdomain ([212.91.95.170]) by smtp.gmail.com with ESMTPSA id b84sm22578986wmh.15.2015.11.17.06.57.01 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 17 Nov 2015 06:57:01 -0800 (PST) From: Carlo Caione To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux@arm.linux.org.uk, linux-meson@googlegroups.com, drake@endlessm.com, jerry.cao@amlogic.com, victor.wan@amlogic.com, pawel.moll@arm.com, arnd@arndb.de Subject: [PATCH 4/7] ARM: DTS: meson8b: Enable reset controller Date: Tue, 17 Nov 2015 15:56:39 +0100 Message-Id: <1447772202-12418-5-git-send-email-carlo@caione.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1447772202-12418-1-git-send-email-carlo@caione.org> References: <1447772202-12418-1-git-send-email-carlo@caione.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151117_065720_916367_A23EFA4B X-CRM114-Status: GOOD ( 10.15 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Carlo Caione MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Carlo Caione Extend the CPU nodes to use the reset controller. Signed-off-by: Carlo Caione --- arch/arm/boot/dts/meson8b.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 745f0f9..977d55f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -60,6 +60,7 @@ compatible = "arm,cortex-a5"; next-level-cache = <&L2>; reg = <0x200>; + resets = <&clkc RST_CORE0>; }; cpu@201 { @@ -67,6 +68,7 @@ compatible = "arm,cortex-a5"; next-level-cache = <&L2>; reg = <0x201>; + resets = <&clkc RST_CORE1>; }; cpu@202 { @@ -74,6 +76,7 @@ compatible = "arm,cortex-a5"; next-level-cache = <&L2>; reg = <0x202>; + resets = <&clkc RST_CORE2>; }; cpu@203 { @@ -81,6 +84,7 @@ compatible = "arm,cortex-a5"; next-level-cache = <&L2>; reg = <0x203>; + resets = <&clkc RST_CORE3>; }; }; @@ -153,6 +157,7 @@ }; clkc: clock-controller@c1104000 { + #reset-cells = <1>; #clock-cells = <1>; compatible = "amlogic,meson8b-clkc"; reg = <0xc1108000 0x4>, <0xc1104000 0x460>;