Message ID | 1448042309-46445-1-git-send-email-yrdreddy@broadcom.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 20/11/15 09:58, Yendapally Reddy Dhananjaya Reddy wrote: > This enables the pinctrl support for Broadcom NSP SoC > > Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> Looks like a sane pinctrl node here, unless there are objections, I would like to go ahead and apply this for v4.5, thanks! > --- > arch/arm/boot/dts/bcm-nsp.dtsi | 7 +++++++ > arch/arm/boot/dts/bcm958625k.dts | 9 +++++++++ > 2 files changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi > index b74438c..a16d743 100644 > --- a/arch/arm/boot/dts/bcm-nsp.dtsi > +++ b/arch/arm/boot/dts/bcm-nsp.dtsi > @@ -226,5 +226,12 @@ > interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>; > clock-frequency = <100000>; > }; > + > + pinctrl: pinctrl@3f1c0 { > + compatible = "brcm,nsp-pinmux"; > + reg = <0x3f1c0 0x04>, > + <0x30028 0x04>, > + <0x3f408 0x04>; > + }; > }; > }; > diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts > index b966955..e298450 100644 > --- a/arch/arm/boot/dts/bcm958625k.dts > +++ b/arch/arm/boot/dts/bcm958625k.dts > @@ -105,3 +105,12 @@ > }; > }; > }; > + > +&pinctrl { > + pinctrl-names = "default"; > + pinctrl-0 = <&nand_sel>; > + nand_sel: nand_sel { > + function = "nand"; > + groups = "nand_grp"; > + }; > +}; >
On Wed, Nov 25, 2015 at 1:08 AM, Florian Fainelli <f.fainelli@gmail.com> wrote: > On 20/11/15 09:58, Yendapally Reddy Dhananjaya Reddy wrote: >> This enables the pinctrl support for Broadcom NSP SoC >> >> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> > > Looks like a sane pinctrl node here, unless there are objections, I > would like to go ahead and apply this for v4.5, thanks! I'm waiting for an indication from the other BCM pinctrl maintainers to tell whether this SoC is unique enough to deserve its own driver. Yours, Linus Walleij
Hi Linus, On 15-12-01 02:00 AM, Linus Walleij wrote: > On Wed, Nov 25, 2015 at 1:08 AM, Florian Fainelli <f.fainelli@gmail.com> wrote: >> On 20/11/15 09:58, Yendapally Reddy Dhananjaya Reddy wrote: >>> This enables the pinctrl support for Broadcom NSP SoC >>> >>> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> >> >> Looks like a sane pinctrl node here, unless there are objections, I >> would like to go ahead and apply this for v4.5, thanks! > > I'm waiting for an indication from the other BCM pinctrl > maintainers to tell whether this SoC is unique enough to deserve > its own driver. If Stephen Warren is the other maintainer you are talking about he does not work at Broadcom. I don't think he is familiar with the variety of pinctrl implementations present. But yes, the pinctrl implementations have been rather unique in these Socs. As Ray indicated we're trying to get the silicon designers to standardize more going forward so we don't have to create unique drivers for these SoCs. > > Yours, > Linus Walleij > Regards, Scott
On 12/1/2015 8:05 AM, Scott Branden wrote: > Hi Linus, > > On 15-12-01 02:00 AM, Linus Walleij wrote: >> On Wed, Nov 25, 2015 at 1:08 AM, Florian Fainelli >> <f.fainelli@gmail.com> wrote: >>> On 20/11/15 09:58, Yendapally Reddy Dhananjaya Reddy wrote: >>>> This enables the pinctrl support for Broadcom NSP SoC >>>> >>>> Signed-off-by: Yendapally Reddy Dhananjaya Reddy >>>> <yrdreddy@broadcom.com> >>> >>> Looks like a sane pinctrl node here, unless there are objections, I >>> would like to go ahead and apply this for v4.5, thanks! >> >> I'm waiting for an indication from the other BCM pinctrl >> maintainers to tell whether this SoC is unique enough to deserve >> its own driver. > If Stephen Warren is the other maintainer you are talking about he does > not work at Broadcom. I don't think he is familiar with the variety of > pinctrl implementations present. But yes, the pinctrl implementations > have been rather unique in these Socs. As Ray indicated we're trying to > get the silicon designers to standardize more going forward so we don't > have to create unique drivers for these SoCs. Yes. Hopefully NSP and NS2 will be the last iProc based SoCs that require unique pinmux driver. >> >> Yours, >> Linus Walleij >> > > Regards, > Scott > Thanks, Ray
On 20/11/15 09:58, Yendapally Reddy Dhananjaya Reddy wrote: > This enables the pinctrl support for Broadcom NSP SoC > > Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> Applied to devicetree/next, thanks!
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index b74438c..a16d743 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -226,5 +226,12 @@ interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>; clock-frequency = <100000>; }; + + pinctrl: pinctrl@3f1c0 { + compatible = "brcm,nsp-pinmux"; + reg = <0x3f1c0 0x04>, + <0x30028 0x04>, + <0x3f408 0x04>; + }; }; }; diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts index b966955..e298450 100644 --- a/arch/arm/boot/dts/bcm958625k.dts +++ b/arch/arm/boot/dts/bcm958625k.dts @@ -105,3 +105,12 @@ }; }; }; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&nand_sel>; + nand_sel: nand_sel { + function = "nand"; + groups = "nand_grp"; + }; +};
This enables the pinctrl support for Broadcom NSP SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> --- arch/arm/boot/dts/bcm-nsp.dtsi | 7 +++++++ arch/arm/boot/dts/bcm958625k.dts | 9 +++++++++ 2 files changed, 16 insertions(+)