Message ID | 1448282225-2635-2-git-send-email-ariel@vanguardiasur.com.ar (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
(+To: Joachim) El 23/11/15 a las 09:37, Ariel D'Alessandro escribió: > The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB > EEPROM memory. > > Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> > --- > arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts > index 5f500c1..03bdf77 100644 > --- a/arch/arm/boot/dts/lpc4337-ciaa.dts > +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts > @@ -155,6 +155,10 @@ > }; > }; > > +&eeprom { > + status = "okay"; > +}; > + > &enet_tx_clk { > clock-frequency = <50000000>; > }; >
Hi Ariel, On 25 November 2015 at 13:28, Ariel D'Alessandro <ariel@vanguardiasur.com.ar> wrote: > (+To: Joachim) > > El 23/11/15 a las 09:37, Ariel D'Alessandro escribió: >> The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB >> EEPROM memory. >> >> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> >> --- >> arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts >> index 5f500c1..03bdf77 100644 >> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts >> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts >> @@ -155,6 +155,10 @@ >> }; >> }; >> >> +&eeprom { >> + status = "okay"; >> +}; >> + I already had a patch that enabled the eeprom for all boards that included the lpc4357.dtsi from when I tested your driver. So opted to use that patch instead of this one. This is really a SoC device feature that doesn't require any board resources so I think it is better to have this entry in lpc4357.dtsi. regards, Joachim Eastwood
Joachim, El 14/12/15 a las 19:52, Joachim Eastwood escribió: > Hi Ariel, > > On 25 November 2015 at 13:28, Ariel D'Alessandro > <ariel@vanguardiasur.com.ar> wrote: >> (+To: Joachim) >> >> El 23/11/15 a las 09:37, Ariel D'Alessandro escribió: >>> The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB >>> EEPROM memory. >>> >>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> >>> --- >>> arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts >>> index 5f500c1..03bdf77 100644 >>> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts >>> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts >>> @@ -155,6 +155,10 @@ >>> }; >>> }; >>> >>> +&eeprom { >>> + status = "okay"; >>> +}; >>> + > > I already had a patch that enabled the eeprom for all boards that > included the lpc4357.dtsi from when I tested your driver. So opted to > use that patch instead of this one. This is really a SoC device > feature that doesn't require any board resources so I think it is > better to have this entry in lpc4357.dtsi. Yeah, you're right. Fine for me, thanks.
diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts index 5f500c1..03bdf77 100644 --- a/arch/arm/boot/dts/lpc4337-ciaa.dts +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts @@ -155,6 +155,10 @@ }; }; +&eeprom { + status = "okay"; +}; + &enet_tx_clk { clock-frequency = <50000000>; };
The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> --- arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++ 1 file changed, 4 insertions(+)