From patchwork Mon Nov 23 18:33:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 7685091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 15B479F1BE for ; Mon, 23 Nov 2015 18:38:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 392C920801 for ; Mon, 23 Nov 2015 18:38:45 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 675E6207FE for ; Mon, 23 Nov 2015 18:38:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a0vyx-0002qt-Nu; Mon, 23 Nov 2015 18:36:55 +0000 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a0vwi-0000By-80 for linux-arm-kernel@lists.infradead.org; Mon, 23 Nov 2015 18:34:39 +0000 Received: by pabfh17 with SMTP id fh17so204845085pab.0 for ; Mon, 23 Nov 2015 10:34:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kpLf532a/C3BWhV5MguyABNGhms3XdtB/nFLQq4rmnw=; b=joEFLqFMlc4oQHgCNpguPY92QdbWMDjJitL/Y4ErXhi51yRKq/2WkXTmBR67CaqFXc Ot07GyZ5nTTODbJaNl8CA0mVtECaLS2JwsztjwMBYrRJ6AKqYpXKNOqFHmcWQ0mQsPQM 301+q+J3YbCUEd339sEQSLpw4iX+jL3Fv9CCG9fNMaBQN5opEQ0p3dTf3/ClSDxFxNHR /msaHj+e/aCERXtVn12VILIc/mQc2Ci3sT1Isf4Fj6yqROZv6WYFi/tgAT0/ZHg/73uz fVHfWcJBsT47+KdgQYK4kllnW+TKEcKvPC6wzlveczFXSVpLqUSWylTkXjHdqkLeT+Oy A7Zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kpLf532a/C3BWhV5MguyABNGhms3XdtB/nFLQq4rmnw=; b=i4Im2P5ccmc4AUUYHFaZJ/fgW8Gdtx9n7IOWdh20gPfcOE+UzGLKXCp27kfNOu8IoP Umc6d3BIKIYZPK4IoDuePuXexGxRrQsI8QV87SJrHqpnG0xaaKzYVgqOOH2g/0pr1/OD La8NhJlStHLNVmf2MJK5COiQg7UDin0Oebx7FsX2Pqg1kShjn2hfmppwsSsJl3xQDpP8 8gmiwdL51kKiSHfXJuIDNSmxlvTzy8t6LWNbxJW94gD8Ox7k9lGFFD65qnYqEra5SpkA FHumIPLgo6lUBawZwBSkzfkC8NqLDNeQe5pa8rjU+l5PdLa9238aD0NsUyeJ5L1/qL/0 EhGA== X-Gm-Message-State: ALoCoQn/E1z7LXjDDfh+HLsjqlZEtxuHMCWifqhRNLo7vhnkassWXoMbcaFLLH2QRj24vAfKuQaJ X-Received: by 10.68.142.74 with SMTP id ru10mr37152535pbb.157.1448303655832; Mon, 23 Nov 2015 10:34:15 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id r20sm10865186pfa.93.2015.11.23.10.34.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Nov 2015 10:34:15 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net, nicolas.pitre@linaro.org Subject: [RESEND PATCH V4 11/26] coresight: etm3x: changing default trace configuration Date: Mon, 23 Nov 2015 11:33:03 -0700 Message-Id: <1448303598-11249-12-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1448303598-11249-1-git-send-email-mathieu.poirier@linaro.org> References: <1448303598-11249-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151123_103436_512001_34A24180 X-CRM114-Status: GOOD ( 16.00 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, pawel.moll@arm.com, linux-doc@vger.kernel.org, fainelli@broadcom.com, linux-kernel@vger.kernel.org, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Changing default configuration to include the entire address range rather than just the kernel. That way traces are more inclusive and it is easier to narrow down if needed. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm.h | 2 ++ drivers/hwtracing/coresight/coresight-etm3x.c | 29 ++++++++++++--------------- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index a8663780a908..f01862fc98dd 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -146,6 +146,7 @@ * @startstop_ctrl: setting for register ETMTSSCR. * @enable_event: setting for register ETMTEEVR. * @enable_ctrl1: setting for register ETMTECR1. + * @enable_ctrl2: setting for register ETMTECR2. * @fifofull_level: setting for register ETMFFLR. * @addr_idx: index for the address comparator selection. * @addr_val: value for address comparator register. @@ -179,6 +180,7 @@ struct etm_config { u32 startstop_ctrl; u32 enable_event; u32 enable_ctrl1; + u32 enable_ctrl2; u32 fifofull_level; u8 addr_idx; u32 addr_val[ETM_MAX_ADDR_CMP]; diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index d1235711b576..4c54e104b610 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -607,26 +607,23 @@ static void etm_init_arch_data(void *info) static void etm_init_default_data(struct etm_config *config) { - u32 flags = (1 << 0 | /* instruction execute*/ - 3 << 3 | /* ARM instruction */ - 0 << 5 | /* No data value comparison */ - 0 << 7 | /* No exact mach */ - 0 << 8 | /* Ignore context ID */ - 0 << 10); /* Security ignored */ - if (WARN_ON_ONCE(!config)) return; - config->ctrl = (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN); - config->enable_ctrl1 = ETMTECR1_ADDR_COMP_1; - config->addr_val[0] = (u32) _stext; - config->addr_val[1] = (u32) _etext; - config->addr_acctype[0] = flags; - config->addr_acctype[1] = flags; - config->addr_type[0] = ETM_ADDR_TYPE_RANGE; - config->addr_type[1] = ETM_ADDR_TYPE_RANGE; - etm_set_default(config); + + /* + * Taken verbatim from the TRM: + * + * To trace all memory: + * set bit [24] in register 0x009, the ETMTECR1, to 1 + * set all other bits in register 0x009, the ETMTECR1, to 0 + * set all bits in register 0x007, the ETMTECR2, to 0 + * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). + */ + config->enable_ctrl1 = BIT(24); + config->enable_ctrl2 = 0x0; + config->enable_event = ETM_HARD_WIRE_RES_A; } static void etm_init_trace_id(struct etm_drvdata *drvdata)