From patchwork Mon Nov 23 18:32:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 7685021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6BCA7BF90C for ; Mon, 23 Nov 2015 18:37:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9F3A2207ED for ; Mon, 23 Nov 2015 18:37:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B574C207FE for ; Mon, 23 Nov 2015 18:37:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a0vxj-0001wq-UB; Mon, 23 Nov 2015 18:35:39 +0000 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a0vwX-00009i-RK for linux-arm-kernel@lists.infradead.org; Mon, 23 Nov 2015 18:34:32 +0000 Received: by padhx2 with SMTP id hx2so198914635pad.1 for ; Mon, 23 Nov 2015 10:34:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mJtCMODWSwgWbfJDn5XBAFGusvbTAom1iFHE/nOf6B0=; b=jW4cRCO8jIdsoP4kO7tBGMCRIUtgPqyo3pnQTcRgfAFmMYMpvir60V3fNM+a6bvxAP ROKs5AGSJVRLpDjXMOCmDJlgOaeuVE9R8KUsksgIafQKXwdMpOIUTlFO1h5EdYoERHPo n+5uRpVLwmNDvLJp8Mj6WaWdcFSpnr1dQyOdtRsDWmRVb0VJQYrGTjLac0M4Mjyakwar 1GPJXQSLDWOjBZPV6atbrIACL3veMZV+tnqt0feEazEyAGDSJ5R58lxr62BG4TlkzUYW BCP60U/kDRnoDk9HWsFQ06s3xwauOSp0TD6ea3ARQ6lOx9ipd2eW+8CzU/qHwp+gX0n9 mFSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mJtCMODWSwgWbfJDn5XBAFGusvbTAom1iFHE/nOf6B0=; b=DGRBHodewB8PIMJOK6ezqQ2HVxLTg7UsKCfuJOd8AwO7/m1hyv8VzZjj4TGzPpv77g Ac42xHkf4pxk3JnzwLLQCf8x8B31vpvPwAFQE/Zq1qHXooyi6qa5OnZ+mv9Y9C2yGkyn LMfxKT2GLgNYjng76O+Qg870l9NQwm3IObvSk/OOmeCfvFe5e6AqnWj/RhHbwXTCadCX Pm+WBCfzarDaqQBSHfme5pHowp3o2VhyGpf3ZiwMzvrK17Wp19Wkru19go8xoOO4xPGt An2NAT9eFnwUnbsZyL7vhQ7kUH7YQPZN6ma9384gRqzEE0ksIV2r/E9Kyv7hsIKa5k5W yASA== X-Gm-Message-State: ALoCoQkVXyUaLzQhFnNfxVnOYqOZ/T0wJS0SdT5Rl95MQhIRhSC5AuyQjDqaJJdPkmstBInSlcXA X-Received: by 10.66.142.136 with SMTP id rw8mr37657103pab.36.1448303644979; Mon, 23 Nov 2015 10:34:04 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id r20sm10865186pfa.93.2015.11.23.10.34.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Nov 2015 10:34:04 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net, nicolas.pitre@linaro.org Subject: [RESEND PATCH V4 05/26] coresight: etm3x: implementing 'cpu_id()' API Date: Mon, 23 Nov 2015 11:32:57 -0700 Message-Id: <1448303598-11249-6-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1448303598-11249-1-git-send-email-mathieu.poirier@linaro.org> References: <1448303598-11249-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151123_103426_139318_B4AD388C X-CRM114-Status: GOOD ( 14.27 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, pawel.moll@arm.com, linux-doc@vger.kernel.org, fainelli@broadcom.com, linux-kernel@vger.kernel.org, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Other than plainly parsing the device tree there is no way to know which CPU a tracer is affined to. As such adding an interface to lookup the CPU field enclosed in the etm_drvdata structure that was initialised at boot time. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 8 ++++++++ include/linux/coresight.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 67af548a874d..74526f044a06 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -312,6 +312,13 @@ static void etm_enable_hw(void *info) dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); } +static int etm_cpu_id(struct coresight_device *csdev) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + return drvdata->cpu; +} + int etm_get_trace_id(struct etm_drvdata *drvdata) { unsigned long flags; @@ -438,6 +445,7 @@ static void etm_disable(struct coresight_device *csdev) } static const struct coresight_ops_source etm_source_ops = { + .cpu_id = etm_cpu_id, .trace_id = etm_trace_id, .enable = etm_enable, .disable = etm_disable, diff --git a/include/linux/coresight.h b/include/linux/coresight.h index a7cabfa23b55..bf62b265bf52 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -205,12 +205,15 @@ struct coresight_ops_link { /** * struct coresight_ops_source - basic operations for a source * Operations available for sources. + * @cpu_id: returns the value of the CPU number this component + * is associated to. * @trace_id: returns the value of the component's trace ID as known to the HW. * @enable: enables tracing for a source. * @disable: disables tracing for a source. */ struct coresight_ops_source { + int (*cpu_id)(struct coresight_device *csdev); int (*trace_id)(struct coresight_device *csdev); int (*enable)(struct coresight_device *csdev); void (*disable)(struct coresight_device *csdev);