| Message ID | 1448433590-1399-2-git-send-email-lifshitz@compulab.co.il (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Nov 25, 2015 at 08:39:33AM +0200, Dmitry Lifshitz wrote: > Add support for CompuLab CM-SOM-AM57X board. > > CL-SOM-AM57x is a miniature System-on-Module (SoM) based on > TI Sitara AM57x ARM Cortex-A15 System-on-Chip family. > > https://www.compulab.co.il/products/computer-on-modules/cl-som-am57x-ti-am5728-am5718-system-on-module/ > > Add basic DT support for standalone module (without a carrier board): > > * Memory configuration > * Heartbeat led > * I2C1 bus > * PMIC > * SATA > > Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> > Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Rob Herring <robh@kernel.org> > --- > .../devicetree/bindings/arm/omap/omap.txt | 3 + > arch/arm/boot/dts/Makefile | 3 +- > arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 259 +++++++++++++++++++++ > 3 files changed, 264 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/boot/dts/am57xx-cl-som-am57x.dts > > diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt > index da84372..dd53c90 100644 > --- a/Documentation/devicetree/bindings/arm/omap/omap.txt > +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt > @@ -156,6 +156,9 @@ Boards: > - AM437x SK EVM: AM437x StarterKit Evaluation Module > compatible = "ti,am437x-sk-evm", "ti,am4372", "ti,am43" > > +- AM57XX CL-SOM-AM57x > + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" > + > - DRA742 EVM: Software Development Board for DRA742 > compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7" > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 5492a24..803a020 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -477,8 +477,9 @@ dtb-$(CONFIG_SOC_OMAP5) += \ > omap5-sbc-t54.dtb \ > omap5-uevm.dtb > dtb-$(CONFIG_SOC_DRA7XX) += \ > - dra7-evm.dtb \ > am57xx-beagle-x15.dtb \ > + am57xx-cl-som-am57x.dtb \ > + dra7-evm.dtb \ > dra72-evm.dtb > dtb-$(CONFIG_ARCH_ORION5X) += \ > orion5x-lacie-d2-network.dtb \ > diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts > new file mode 100644 > index 0000000..b11d7da > --- /dev/null > +++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts > @@ -0,0 +1,259 @@ > +/* > + * Support for CompuLab CL-SOM-AM57x System-on-Module > + * > + * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/ > + * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License version 2 as published by > + * the Free Software Foundation. > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/interrupt-controller/irq.h> > +#include "dra74x.dtsi" > + > +/ { > + model = "CompuLab CL-SOM-AM57x"; > + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; > + > + memory { > + device_type = "memory"; > + reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */ > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&leds_pins_default>; > + > + led@0 { > + label = "cl-som-am57x:green"; > + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + default-state = "off"; > + }; > + }; > +}; > + > +&dra7_pmx_core { > + leds_pins_default: leds_pins_default { > + pinctrl-single,pins = < > + DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ > + >; > + }; > + > + i2c1_pins_default: i2c1_pins_default { > + pinctrl-single,pins = < > + DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ > + DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ > + >; > + }; > + > + tps659038_pins_default: tps659038_pins_default { > + pinctrl-single,pins = < > + DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ > + >; > + }; > +}; > + > +&i2c1 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c1_pins_default>; > + clock-frequency = <400000>; > + > + tps659038: tps659038@58 { > + compatible = "ti,tps659038"; > + reg = <0x58>; > + interrupt-parent = <&gpio1>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&tps659038_pins_default>; > + > + #interrupt-cells = <2>; > + interrupt-controller; > + > + ti,system-power-controller; > + > + tps659038_pmic { > + compatible = "ti,tps659038-pmic"; > + > + regulators { > + smps12_reg: smps12 { > + /* VDD_MPU */ > + regulator-name = "smps12"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1250000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps3_reg: smps3 { > + /* VDD_DDR */ > + regulator-name = "smps3"; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps45_reg: smps45 { > + /* VDD_DSPEVE */ > + regulator-name = "smps45"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps6_reg: smps6 { > + /* VDD_GPU */ > + regulator-name = "smps6"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps7_reg: smps7 { > + /* VDD_CORE */ > + regulator-name = "smps7"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps8_reg: smps8 { > + /* VDD_IVA */ > + regulator-name = "smps8"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps9_reg: smps9 { > + /* PMIC_3V3 */ > + regulator-name = "smps9"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + > + ldo1_reg: ldo1 { > + /* VDD_SD / VDDSHV8 */ > + regulator-name = "ldo1"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + ldo2_reg: ldo2 { > + /* VDD_1V8 */ > + regulator-name = "ldo2"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo3_reg: ldo3 { > + /* VDDA_1V8_PHYA */ > + regulator-name = "ldo3"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo4_reg: ldo4 { > + /* VDDA_1V8_PHYB */ > + regulator-name = "ldo4"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo9_reg: ldo9 { > + /* VDD_RTC */ > + regulator-name = "ldo9"; > + regulator-min-microvolt = <1050000>; > + regulator-max-microvolt = <1050000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldoln_reg: ldoln { > + /* VDDA_1V8_PLL */ > + regulator-name = "ldoln"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldousb_reg: ldousb { > + /* VDDA_3V_USB: VDDA_USBHS33 */ > + regulator-name = "ldousb"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + }; > + > + /* regen1 not used */ > + }; > + }; > + > + tps659038_pwr_button: tps659038_pwr_button { > + compatible = "ti,palmas-pwrbutton"; > + interrupt-parent = <&tps659038>; > + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; > + wakeup-source; > + ti,palmas-long-press-seconds = <12>; > + }; > + > + tps659038_gpio: tps659038_gpio { > + compatible = "ti,palmas-gpio"; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + }; > +}; > + > +&cpu0 { > + cpu0-supply = <&smps12_reg>; > + voltage-tolerance = <1>; > +}; > + > +&sata { > + status = "okay"; > +}; > + > +&mailbox5 { > + status = "okay"; > + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { > + status = "okay"; > + }; > + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { > + status = "okay"; > + }; > +}; > + > +&mailbox6 { > + status = "okay"; > + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { > + status = "okay"; > + }; > + mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { > + status = "okay"; > + }; > +}; > -- > 1.9.1 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
On 11/25/2015 12:39 AM, Dmitry Lifshitz wrote: [...] > diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts > new file mode 100644 > index 0000000..b11d7da > --- /dev/null > +++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts [...] > +/ { > + model = "CompuLab CL-SOM-AM57x"; > + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; > + > + memory { > + device_type = "memory"; > + reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */ I think if you like to enable LPAE, the format might look a little different.. > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&leds_pins_default>; > + > + led@0 { > + label = "cl-som-am57x:green"; > + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + default-state = "off"; > + }; > + }; > +}; > + > +&dra7_pmx_core { > + leds_pins_default: leds_pins_default { > + pinctrl-single,pins = < > + DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ > + >; > + }; > + > + i2c1_pins_default: i2c1_pins_default { > + pinctrl-single,pins = < > + DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ > + DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ > + >; > + }; > + > + tps659038_pins_default: tps659038_pins_default { > + pinctrl-single,pins = < > + DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ > + >; > + }; Generic comment: As per requirements of the SoC -> all pinctrl must be done in bootloader. this was a recommendation that came in too late for TI platforms that got introduced in upstream, but that cleanup should eventually take place as well. > +}; > + > +&i2c1 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c1_pins_default>; > + clock-frequency = <400000>; > + > + tps659038: tps659038@58 { > + compatible = "ti,tps659038"; > + reg = <0x58>; > + interrupt-parent = <&gpio1>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; Also See: https://patchwork.kernel.org/patch/7596541/ -> Documentation/devicetree/bindings/i2c/i2c.txt -> since you seem to have a PMIC with power button, you might be able to get wakeup source also there. > + > + pinctrl-names = "default"; > + pinctrl-0 = <&tps659038_pins_default>; > + > + #interrupt-cells = <2>; > + interrupt-controller; > + > + ti,system-power-controller; Assuming powerhold signal and BOOT0,1 is proper here, else poweroff will never work. > + > + tps659038_pmic { > + compatible = "ti,tps659038-pmic"; > + > + regulators { > + smps12_reg: smps12 { > + /* VDD_MPU */ > + regulator-name = "smps12"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1250000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps3_reg: smps3 { > + /* VDD_DDR */ > + regulator-name = "smps3"; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps45_reg: smps45 { > + /* VDD_DSPEVE */ > + regulator-name = "smps45"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; 1.25v if you want to support OPP_HIGH. as per latest data sheet. > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps6_reg: smps6 { > + /* VDD_GPU */ > + regulator-name = "smps6"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; 1.25v if you want to support OPP_HIGH. as per latest data sheet. > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps7_reg: smps7 { > + /* VDD_CORE */ > + regulator-name = "smps7"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps8_reg: smps8 { > + /* VDD_IVA */ > + regulator-name = "smps8"; > + regulator-min-microvolt = < 850000>; > + regulator-max-microvolt = <1160000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + smps9_reg: smps9 { > + /* PMIC_3V3 */ > + regulator-name = "smps9"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + > + ldo1_reg: ldo1 { > + /* VDD_SD / VDDSHV8 */ > + regulator-name = "ldo1"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; for eventual UHS mode support, it is recommended to keep VDD_SD separate from VDDSHV8. many of TI evms also suffer from this issue :( > + regulator-boot-on; > + regulator-always-on; > + }; > + > + ldo2_reg: ldo2 { > + /* VDD_1V8 */ > + regulator-name = "ldo2"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo3_reg: ldo3 { > + /* VDDA_1V8_PHYA */ > + regulator-name = "ldo3"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldo4_reg: ldo4 { > + /* VDDA_1V8_PHYB */ > + regulator-name = "ldo4"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; Happy to see this is already split up. you might want to document which PHYs are supplied by PHYA/B in comments for future reference instead of having to dig through schematics to figure that out.. > + > + ldo9_reg: ldo9 { > + /* VDD_RTC */ > + regulator-name = "ldo9"; > + regulator-min-microvolt = <1050000>; > + regulator-max-microvolt = <1050000>; > + regulator-always-on; > + regulator-boot-on; as per data sheet: "VD_RTC can optionally be tied to VD_CORE and operate at the VD_CORE AVS voltages." I assume that is not the case here. > + }; > + > + ldoln_reg: ldoln { > + /* VDDA_1V8_PLL */ > + regulator-name = "ldoln"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + ldousb_reg: ldousb { > + /* VDDA_3V_USB: VDDA_USBHS33 */ > + regulator-name = "ldousb"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; All SoC VDDAs must be always-on. [...]
Hi Nishanth, Thank you for the provided feedback. On 11/25/2015 11:36 PM, Nishanth Menon wrote: > On 11/25/2015 12:39 AM, Dmitry Lifshitz wrote: > [...] > >> diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts >> new file mode 100644 >> index 0000000..b11d7da >> --- /dev/null >> +++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts > [...] > >> +/ { >> + model = "CompuLab CL-SOM-AM57x"; >> + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; >> + >> + memory { >> + device_type = "memory"; >> + reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */ > > I think if you like to enable LPAE, the format might look a little > different.. > We would like to have a basic HW support in the mainline. It might be enhanced later, once we get to work on LPAE stuff. >> + }; >> + >> + leds { >> + compatible = "gpio-leds"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&leds_pins_default>; >> + >> + led@0 { >> + label = "cl-som-am57x:green"; >> + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; >> + linux,default-trigger = "heartbeat"; >> + default-state = "off"; >> + }; >> + }; >> +}; >> + >> +&dra7_pmx_core { >> + leds_pins_default: leds_pins_default { >> + pinctrl-single,pins = < >> + DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ >> + >; >> + }; >> + >> + i2c1_pins_default: i2c1_pins_default { >> + pinctrl-single,pins = < >> + DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ >> + DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ >> + >; >> + }; >> + >> + tps659038_pins_default: tps659038_pins_default { >> + pinctrl-single,pins = < >> + DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ >> + >; >> + }; > > Generic comment: As per requirements of the SoC -> all pinctrl must be > done in bootloader. this was a recommendation that came in too late > for TI platforms that got introduced in upstream, but that cleanup > should eventually take place as well. > Please, could you provide a reference to those recommendations. Do you mean pinctrl for PMIC pins only? >> +}; >> + >> +&i2c1 { >> + status = "okay"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&i2c1_pins_default>; >> + clock-frequency = <400000>; >> + >> + tps659038: tps659038@58 { >> + compatible = "ti,tps659038"; >> + reg = <0x58>; >> + interrupt-parent = <&gpio1>; >> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > > Also See: https://patchwork.kernel.org/patch/7596541/ -> > Documentation/devicetree/bindings/i2c/i2c.txt -> since you seem to > have a PMIC with power button, you might be able to get wakeup source > also there. > Do you mean just adding "wakeup-source" property? According to Documentation/devicetree/bindings/i2c/i2c.txt the primary interrupt will be used as wakeup interrupt. >> + >> + pinctrl-names = "default"; >> + pinctrl-0 = <&tps659038_pins_default>; >> + >> + #interrupt-cells = <2>; >> + interrupt-controller; >> + >> + ti,system-power-controller; > > Assuming powerhold signal and BOOT0,1 is proper here, else poweroff > will never work. > Please, could you provide more details regarding this issue. >> + >> + tps659038_pmic { >> + compatible = "ti,tps659038-pmic"; >> + >> + regulators { >> + smps12_reg: smps12 { >> + /* VDD_MPU */ >> + regulator-name = "smps12"; >> + regulator-min-microvolt = < 850000>; >> + regulator-max-microvolt = <1250000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + smps3_reg: smps3 { >> + /* VDD_DDR */ >> + regulator-name = "smps3"; >> + regulator-min-microvolt = <1500000>; >> + regulator-max-microvolt = <1500000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + smps45_reg: smps45 { >> + /* VDD_DSPEVE */ >> + regulator-name = "smps45"; >> + regulator-min-microvolt = < 850000>; >> + regulator-max-microvolt = <1160000>; > > 1.25v if you want to support OPP_HIGH. as per latest data sheet. Ok, got it. Voltages will be updated in V2. Thanks. > >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + smps6_reg: smps6 { >> + /* VDD_GPU */ >> + regulator-name = "smps6"; >> + regulator-min-microvolt = < 850000>; >> + regulator-max-microvolt = <1160000>; > > 1.25v if you want to support OPP_HIGH. as per latest data sheet. > >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + smps7_reg: smps7 { >> + /* VDD_CORE */ >> + regulator-name = "smps7"; >> + regulator-min-microvolt = < 850000>; >> + regulator-max-microvolt = <1160000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + smps8_reg: smps8 { >> + /* VDD_IVA */ >> + regulator-name = "smps8"; >> + regulator-min-microvolt = < 850000>; >> + regulator-max-microvolt = <1160000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + smps9_reg: smps9 { >> + /* PMIC_3V3 */ >> + regulator-name = "smps9"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + >> + ldo1_reg: ldo1 { >> + /* VDD_SD / VDDSHV8 */ >> + regulator-name = "ldo1"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <3300000>; > > for eventual UHS mode support, it is recommended to keep VDD_SD > separate from VDDSHV8. many of TI evms also suffer from this issue :( > That's the way it is. >> + regulator-boot-on; >> + regulator-always-on; >> + }; >> + >> + ldo2_reg: ldo2 { >> + /* VDD_1V8 */ >> + regulator-name = "ldo2"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldo3_reg: ldo3 { >> + /* VDDA_1V8_PHYA */ >> + regulator-name = "ldo3"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldo4_reg: ldo4 { >> + /* VDDA_1V8_PHYB */ >> + regulator-name = "ldo4"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; > > Happy to see this is already split up. you might want to document > which PHYs are supplied by PHYA/B in comments for future reference > instead of having to dig through schematics to figure that out.. > I will provide the comments in V2. Thanks. >> + >> + ldo9_reg: ldo9 { >> + /* VDD_RTC */ >> + regulator-name = "ldo9"; >> + regulator-min-microvolt = <1050000>; >> + regulator-max-microvolt = <1050000>; >> + regulator-always-on; >> + regulator-boot-on; > as per data sheet: > "VD_RTC can optionally be tied to VD_CORE and operate at the VD_CORE > AVS voltages." > > I assume that is not the case here. Yes indeed. > >> + }; >> + >> + ldoln_reg: ldoln { >> + /* VDDA_1V8_PLL */ >> + regulator-name = "ldoln"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + ldousb_reg: ldousb { >> + /* VDDA_3V_USB: VDDA_USBHS33 */ >> + regulator-name = "ldousb"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-boot-on; > > All SoC VDDAs must be always-on. Will be fixed in V2. Thanks. > > [...] > >
On 11/29/2015 06:10 AM, Dmitry Lifshitz wrote: [...] >>> + }; >>> + >>> + leds { >>> + compatible = "gpio-leds"; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&leds_pins_default>; >>> + >>> + led@0 { >>> + label = "cl-som-am57x:green"; >>> + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; >>> + linux,default-trigger = "heartbeat"; >>> + default-state = "off"; >>> + }; >>> + }; >>> +}; >>> + >>> +&dra7_pmx_core { >>> + leds_pins_default: leds_pins_default { >>> + pinctrl-single,pins = < >>> + DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* >>> gpmc_a15.gpio2_5 */ >>> + >; >>> + }; >>> + >>> + i2c1_pins_default: i2c1_pins_default { >>> + pinctrl-single,pins = < >>> + DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | >>> MUX_MODE0) /* i2c1_sda.sda */ >>> + DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | >>> MUX_MODE0) /* i2c1_scl.scl */ >>> + >; >>> + }; >>> + >>> + tps659038_pins_default: tps659038_pins_default { >>> + pinctrl-single,pins = < >>> + DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) >>> /* wakeup0.gpio1_0 */ >>> + >; >>> + }; >> >> Generic comment: As per requirements of the SoC -> all pinctrl must be >> done in bootloader. this was a recommendation that came in too late >> for TI platforms that got introduced in upstream, but that cleanup >> should eventually take place as well. >> > > Please, could you provide a reference to those recommendations. > Do you mean pinctrl for PMIC pins only? You might want to ask your TI support contact for IODelay recommendations. TRM mentions that pinmuxing must be performed under IO isolation. There are silicon constraints in DRA7/AM57xx family, which were not present previously. >>> + tps659038: tps659038@58 { >>> + compatible = "ti,tps659038"; >>> + reg = <0x58>; >>> + interrupt-parent = <&gpio1>; >>> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; >> >> Also See: https://patchwork.kernel.org/patch/7596541/ -> >> Documentation/devicetree/bindings/i2c/i2c.txt -> since you seem to >> have a PMIC with power button, you might be able to get wakeup source >> also there. >> > > Do you mean just adding "wakeup-source" property? > > According to Documentation/devicetree/bindings/i2c/i2c.txt the primary > interrupt will be used as wakeup interrupt. I think you might have to describe a "wakeup" interrupt -> which will be similar in description to the one you used to describe uart wakeup capability. [..] >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&tps659038_pins_default>; >>> + >>> + #interrupt-cells = <2>; >>> + interrupt-controller; >>> + >>> + ti,system-power-controller; >> >> Assuming powerhold signal and BOOT0,1 is proper here, else poweroff >> will never work. >> > > Please, could you provide more details regarding this issue. well, if poweroff command does not completely power off your board, you may want to investigate further. overall, the better circuit configuration is the X15 configuration: https://github.com/beagleboard/beagleboard-x15/blob/master/BeagleBoard-X15_RevA2.pdf Pay close attention to the PMIC GPIO_&/POWERHOLD signal. Also notice the extra reset circuit involved. Again, a topic that you should probably discuss with your TI support contact person. [...]
On 11/29/2015 07:06 PM, Nishanth Menon wrote: > On 11/29/2015 06:10 AM, Dmitry Lifshitz wrote: > [...] >>>> + }; >>>> + >>>> + leds { >>>> + compatible = "gpio-leds"; >>>> + pinctrl-names = "default"; >>>> + pinctrl-0 = <&leds_pins_default>; >>>> + >>>> + led@0 { >>>> + label = "cl-som-am57x:green"; >>>> + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; >>>> + linux,default-trigger = "heartbeat"; >>>> + default-state = "off"; >>>> + }; >>>> + }; >>>> +}; >>>> + >>>> +&dra7_pmx_core { >>>> + leds_pins_default: leds_pins_default { >>>> + pinctrl-single,pins = < >>>> + DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* >>>> gpmc_a15.gpio2_5 */ >>>> + >; >>>> + }; >>>> + >>>> + i2c1_pins_default: i2c1_pins_default { >>>> + pinctrl-single,pins = < >>>> + DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | >>>> MUX_MODE0) /* i2c1_sda.sda */ >>>> + DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | >>>> MUX_MODE0) /* i2c1_scl.scl */ >>>> + >; >>>> + }; >>>> + >>>> + tps659038_pins_default: tps659038_pins_default { >>>> + pinctrl-single,pins = < >>>> + DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) >>>> /* wakeup0.gpio1_0 */ >>>> + >; >>>> + }; >>> >>> Generic comment: As per requirements of the SoC -> all pinctrl must be >>> done in bootloader. this was a recommendation that came in too late >>> for TI platforms that got introduced in upstream, but that cleanup >>> should eventually take place as well. >>> >> >> Please, could you provide a reference to those recommendations. >> Do you mean pinctrl for PMIC pins only? > > You might want to ask your TI support contact for IODelay > recommendations. TRM mentions that pinmuxing must be performed under IO > isolation. There are silicon constraints in DRA7/AM57xx family, which > were not present previously. > Ok. I understand. This might take time... Since we'd like to have this in for 4.5, what would you recommend? Should I drop the muxes from this patch set? All the muxes? Or should we merge this (as it works correctly) in our tests and check on this later after investigation with TI? Also, in theory, there might be pins shared between two or more different functionalities and remuxed during runtime. Can this kind of thing be supported on AM57x? >>>> + tps659038: tps659038@58 { >>>> + compatible = "ti,tps659038"; >>>> + reg = <0x58>; >>>> + interrupt-parent = <&gpio1>; >>>> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; >>> >>> Also See: https://patchwork.kernel.org/patch/7596541/ -> >>> Documentation/devicetree/bindings/i2c/i2c.txt -> since you seem to >>> have a PMIC with power button, you might be able to get wakeup source >>> also there. >>> >> >> Do you mean just adding "wakeup-source" property? >> >> According to Documentation/devicetree/bindings/i2c/i2c.txt the primary >> interrupt will be used as wakeup interrupt. > > I think you might have to describe a "wakeup" interrupt -> which will be > similar in description to the one you used to describe uart wakeup > capability. Ok. Thanks! Well, we are not there yet. I think it would be better to work this out when I will work on the suspend/resume. > > [..] > >>>> + pinctrl-names = "default"; >>>> + pinctrl-0 = <&tps659038_pins_default>; >>>> + >>>> + #interrupt-cells = <2>; >>>> + interrupt-controller; >>>> + >>>> + ti,system-power-controller; >>> >>> Assuming powerhold signal and BOOT0,1 is proper here, else poweroff >>> will never work. >>> >> >> Please, could you provide more details regarding this issue. > > well, if poweroff command does not completely power off your board, you > may want to investigate further. overall, the better circuit > configuration is the X15 configuration: > https://github.com/beagleboard/beagleboard-x15/blob/master/BeagleBoard-X15_RevA2.pdf > Pay close attention to the PMIC GPIO_&/POWERHOLD signal. Also notice the > extra reset circuit involved. > > Again, a topic that you should probably discuss with your TI support > contact person. Ok. Thanks for the explanation! Indeed it does not currently work. I will forward your comments to the h/w designer. > > [...] > Regards, Dmitry
On 11/30/2015 07:29 AM, Dmitry Lifshitz wrote: > On 11/29/2015 07:06 PM, Nishanth Menon wrote: >> On 11/29/2015 06:10 AM, Dmitry Lifshitz wrote: [...] >> >> You might want to ask your TI support contact for IODelay >> recommendations. TRM mentions that pinmuxing must be performed under IO >> isolation. There are silicon constraints in DRA7/AM57xx family, which >> were not present previously. >> > > Ok. I understand. This might take time... > Since we'd like to have this in for 4.5, what would you recommend? > Should I drop the muxes from this patch set? All the muxes? > Or should we merge this (as it works correctly) in our tests and check > on this later after investigation with TI? > > Also, in theory, there might be pins shared between two or more > different functionalities and remuxed during runtime. > Can this kind of thing be supported on AM57x? This is why I suggested to talk and confirm with TI support contact on this. I understand the motivation of SoM concept, but this requires some careful designing around.
On 11/30/2015 07:29 AM, Dmitry Lifshitz wrote: > On 11/29/2015 07:06 PM, Nishanth Menon wrote: >> On 11/29/2015 06:10 AM, Dmitry Lifshitz wrote: [...] >> >> You might want to ask your TI support contact for IODelay >> recommendations. TRM mentions that pinmuxing must be performed under IO >> isolation. There are silicon constraints in DRA7/AM57xx family, which >> were not present previously. >> > > Ok. I understand. This might take time... > Since we'd like to have this in for 4.5, what would you recommend? > Should I drop the muxes from this patch set? All the muxes? > Or should we merge this (as it works correctly) in our tests and check > on this later after investigation with TI? > > Also, in theory, there might be pins shared between two or more > different functionalities and remuxed during runtime. > Can this kind of thing be supported on AM57x? This is why I suggested to talk and confirm with TI support contact on this. I understand the motivation of SoM concept, but this requires some careful designing around.
On Sun, Nov 29, 2015 at 02:10:01PM +0200, Dmitry Lifshitz wrote: > Hi Nishanth, > > Thank you for the provided feedback. > > On 11/25/2015 11:36 PM, Nishanth Menon wrote: > >On 11/25/2015 12:39 AM, Dmitry Lifshitz wrote: > >[...] > > > >>diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts > >>new file mode 100644 > >>index 0000000..b11d7da > >>--- /dev/null > >>+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts > >[...] > > > >>+/ { > >>+ model = "CompuLab CL-SOM-AM57x"; > >>+ compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; > >>+ > >>+ memory { > >>+ device_type = "memory"; > >>+ reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */ > > > >I think if you like to enable LPAE, the format might look a little > >different.. > > > > We would like to have a basic HW support in the mainline. It might be > enhanced later, once we get to work on LPAE stuff. I think what is meant here is the cell sizes should be 2 instead of 1. You can do that independent of LPAE support. I would expect the base SOC dtsi file to set the cell sizes correctly though. Rob
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index da84372..dd53c90 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -156,6 +156,9 @@ Boards: - AM437x SK EVM: AM437x StarterKit Evaluation Module compatible = "ti,am437x-sk-evm", "ti,am4372", "ti,am43" +- AM57XX CL-SOM-AM57x + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" + - DRA742 EVM: Software Development Board for DRA742 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7" diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5492a24..803a020 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -477,8 +477,9 @@ dtb-$(CONFIG_SOC_OMAP5) += \ omap5-sbc-t54.dtb \ omap5-uevm.dtb dtb-$(CONFIG_SOC_DRA7XX) += \ - dra7-evm.dtb \ am57xx-beagle-x15.dtb \ + am57xx-cl-som-am57x.dtb \ + dra7-evm.dtb \ dra72-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += \ orion5x-lacie-d2-network.dtb \ diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts new file mode 100644 index 0000000..b11d7da --- /dev/null +++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts @@ -0,0 +1,259 @@ +/* + * Support for CompuLab CL-SOM-AM57x System-on-Module + * + * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/ + * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include "dra74x.dtsi" + +/ { + model = "CompuLab CL-SOM-AM57x"; + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */ + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins_default>; + + led@0 { + label = "cl-som-am57x:green"; + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; +}; + +&dra7_pmx_core { + leds_pins_default: leds_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ + >; + }; + + i2c1_pins_default: i2c1_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ + DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ + >; + }; + + tps659038_pins_default: tps659038_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ + >; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_default>; + clock-frequency = <400000>; + + tps659038: tps659038@58 { + compatible = "ti,tps659038"; + reg = <0x58>; + interrupt-parent = <&gpio1>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&tps659038_pins_default>; + + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + tps659038_pmic { + compatible = "ti,tps659038-pmic"; + + regulators { + smps12_reg: smps12 { + /* VDD_MPU */ + regulator-name = "smps12"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + smps3_reg: smps3 { + /* VDD_DDR */ + regulator-name = "smps3"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + smps45_reg: smps45 { + /* VDD_DSPEVE */ + regulator-name = "smps45"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1160000>; + regulator-always-on; + regulator-boot-on; + }; + + smps6_reg: smps6 { + /* VDD_GPU */ + regulator-name = "smps6"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1160000>; + regulator-always-on; + regulator-boot-on; + }; + + smps7_reg: smps7 { + /* VDD_CORE */ + regulator-name = "smps7"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1160000>; + regulator-always-on; + regulator-boot-on; + }; + + smps8_reg: smps8 { + /* VDD_IVA */ + regulator-name = "smps8"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1160000>; + regulator-always-on; + regulator-boot-on; + }; + + smps9_reg: smps9 { + /* PMIC_3V3 */ + regulator-name = "smps9"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + + ldo1_reg: ldo1 { + /* VDD_SD / VDDSHV8 */ + regulator-name = "ldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2_reg: ldo2 { + /* VDD_1V8 */ + regulator-name = "ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo3_reg: ldo3 { + /* VDDA_1V8_PHYA */ + regulator-name = "ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4_reg: ldo4 { + /* VDDA_1V8_PHYB */ + regulator-name = "ldo4"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo9_reg: ldo9 { + /* VDD_RTC */ + regulator-name = "ldo9"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + }; + + ldoln_reg: ldoln { + /* VDDA_1V8_PLL */ + regulator-name = "ldoln"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldousb_reg: ldousb { + /* VDDA_3V_USB: VDDA_USBHS33 */ + regulator-name = "ldousb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + /* regen1 not used */ + }; + }; + + tps659038_pwr_button: tps659038_pwr_button { + compatible = "ti,palmas-pwrbutton"; + interrupt-parent = <&tps659038>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + wakeup-source; + ti,palmas-long-press-seconds = <12>; + }; + + tps659038_gpio: tps659038_gpio { + compatible = "ti,palmas-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; +}; + +&cpu0 { + cpu0-supply = <&smps12_reg>; + voltage-tolerance = <1>; +}; + +&sata { + status = "okay"; +}; + +&mailbox5 { + status = "okay"; + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { + status = "okay"; + }; + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { + status = "okay"; + }; +}; + +&mailbox6 { + status = "okay"; + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { + status = "okay"; + }; + mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { + status = "okay"; + }; +};