From patchwork Fri Nov 27 15:44:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 7713901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3B603C0637 for ; Fri, 27 Nov 2015 15:47:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BEA89206C3 for ; Fri, 27 Nov 2015 15:47:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BDFB020761 for ; Fri, 27 Nov 2015 15:47:45 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a2LDo-0006rA-34; Fri, 27 Nov 2015 15:46:04 +0000 Received: from mail-lf0-x22f.google.com ([2a00:1450:4010:c07::22f]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a2LCn-0005CV-Pi for linux-arm-kernel@lists.infradead.org; Fri, 27 Nov 2015 15:45:03 +0000 Received: by lffu14 with SMTP id u14so133792122lff.1 for ; Fri, 27 Nov 2015 07:44:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4mv2bLOx3r2xbB3OuOzH34Q+7549Q8GSLjg62dJ2ees=; b=DBorfoh3gqyvAr8K4MoM6NkxvbVK90ZlP+3KSp6qNCqtIltPK+49EASaNLrt/ax4xq 8PMyqU52Z3aOZ3Cfsw8aaPmmSjGHcGbO+bLDDv7fwds/BfmVnXUO0HBWGNk1CoOvwfpW x/4jTkAnQ+vRKQAMtSnrS5ZFOK78jsEYyY5su8hjASr4gowCvrq9pAVz+9GvHfFWuIAR DkTDnM2HQYsIJBpQRJ/XiKNvFA3gGm7zrasDLeMHKCZxPP69hA/XMAcSoemR1Hjisiia xXmdc3g7JFlblvup+9ut1wYFVoaV0fJ6RDNMYDI8s8Gc61cjXkHyJcaIDcgrHUDiBKRV og7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4mv2bLOx3r2xbB3OuOzH34Q+7549Q8GSLjg62dJ2ees=; b=h2DI6OuaP+odkSDiy5W2SRHtr+jEu4n+573KH/mGc0+lugkonGniTWdilDCHHLPca4 sYXHsQ7kjp/d5SMGDpgsgda9e2huIuVZZk0D5dv7zd/BTiYpUU9p/PLZ8bZssoA/B30e Opy9dHLPQ8AEmmU+ICVbQvQ7GT//hxoj5qXfM/cscInWvyooB3QeYRKN7X/zL3gFWdKp b0uo5X5U5xddG+0KmehdN72pUo6bItU6DDkNIeVjPKpKpQ+GkhCsGSf3Fc9XYbxRf0I4 dxODYB+UiMHMYX3R2B+SRWafHkMMQkBgCTlTiSRHkZPgglyjXAvSBjKBte1V/37gupCr RLiw== X-Gm-Message-State: ALoCoQlRX+pL2g1cjZK0OAS1J1RtKGtpnQKq760B+flJrkB7r+Kb7f8VsQPM/+UQuuiOOFBRDJo1 X-Received: by 10.25.136.139 with SMTP id k133mr20375482lfd.4.1448639079866; Fri, 27 Nov 2015 07:44:39 -0800 (PST) Received: from enkidu.semihalf.local ([80.82.22.190]) by smtp.gmail.com with ESMTPSA id k189sm5096651lfd.12.2015.11.27.07.44.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Nov 2015 07:44:39 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org Subject: [PATCH v3 net 5/6] net: mvneta: enable setting custom TX IP checksum limit Date: Fri, 27 Nov 2015 16:44:25 +0100 Message-Id: <1448639066-13074-6-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1448639066-13074-1-git-send-email-mw@semihalf.com> References: <1448639066-13074-1-git-send-email-mw@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151127_074502_212440_9598EA17 X-CRM114-Status: GOOD ( 15.33 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.petazzoni@free-electrons.com, andrew@lunn.ch, linux@arm.linux.org.uk, jason@lakedaemon.net, myair@marvell.com, jaz@semihalf.com, simon.guinot@sequanux.org, xswang@marvell.com, nadavh@marvell.com, alior@marvell.com, tn@semihalf.com, gregory.clement@free-electrons.com, nitroshift@yahoo.com, mw@semihalf.com, davem@davemloft.net, sebastian.hesselbarth@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since Armada 38x SoC can support IP checksum for jumbo frames only on a single port, it means that this feature should be enabled per-port, rather than for the whole SoC. This patch enables setting custom TX IP checksum limit by adding new optional property to the mvneta device tree node. If not used, by default 1600B is set for "marvell,armada-370-neta" and 9800B for other strings, which ensures backward compatibility. Binding documentation is updated accordingly. Signed-off-by: Marcin Wojtas --- .../bindings/net/marvell-armada-370-neta.txt | 6 ++++++ drivers/net/ethernet/marvell/mvneta.c | 19 +++++++++++++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt index f5a8ca2..aeea50c 100644 --- a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt +++ b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt @@ -8,6 +8,11 @@ Required properties: - phy-mode: See ethernet.txt file in the same directory - clocks: a pointer to the reference clock for this device. +Optional properties: +- tx-csum-limit: maximum mtu supported by port that allow TX checksum. + Value is presented in bytes. If not used, by default 1600B is set for + "marvell,armada-370-neta" and 9800B for others. + Example: ethernet@d0070000 { @@ -15,6 +20,7 @@ ethernet@d0070000 { reg = <0xd0070000 0x2500>; interrupts = <8>; clocks = <&gate_clk 4>; + tx-csum-limit = <9800> status = "okay"; phy = <&phy0>; phy-mode = "rgmii-id"; diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index 5a98c5d..ed622fa 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c @@ -243,6 +243,7 @@ #define MVNETA_VLAN_TAG_LEN 4 #define MVNETA_CPU_D_CACHE_LINE_SIZE 32 +#define MVNETA_TX_CSUM_DEF_SIZE 1600 #define MVNETA_TX_CSUM_MAX_SIZE 9800 #define MVNETA_ACC_MODE_EXT 1 @@ -3256,6 +3257,7 @@ static int mvneta_probe(struct platform_device *pdev) char hw_mac_addr[ETH_ALEN]; const char *mac_from; const char *managed; + int tx_csum_limit; int phy_mode; int err; int cpu; @@ -3356,8 +3358,21 @@ static int mvneta_probe(struct platform_device *pdev) } } - if (of_device_is_compatible(dn, "marvell,armada-370-neta")) - pp->tx_csum_limit = 1600; + if (!of_property_read_u32(dn, "tx-csum-limit", &tx_csum_limit)) { + if (tx_csum_limit < 0 || + tx_csum_limit > MVNETA_TX_CSUM_MAX_SIZE) { + tx_csum_limit = MVNETA_TX_CSUM_DEF_SIZE; + dev_info(&pdev->dev, + "Wrong TX csum limit in DT, set to %dB\n", + MVNETA_TX_CSUM_DEF_SIZE); + } + } else if (of_device_is_compatible(dn, "marvell,armada-370-neta")) { + tx_csum_limit = MVNETA_TX_CSUM_DEF_SIZE; + } else { + tx_csum_limit = MVNETA_TX_CSUM_MAX_SIZE; + } + + pp->tx_csum_limit = tx_csum_limit; pp->tx_ring_size = MVNETA_MAX_TXD; pp->rx_ring_size = MVNETA_MAX_RXD;