From patchwork Mon Nov 30 02:14:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 7720341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id ADF1C9F3CD for ; Mon, 30 Nov 2015 02:21:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C631120529 for ; Mon, 30 Nov 2015 02:21:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E035B20528 for ; Mon, 30 Nov 2015 02:21:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a3E4q-0000Sv-SQ; Mon, 30 Nov 2015 02:20:28 +0000 Received: from mail-pa0-x22f.google.com ([2607:f8b0:400e:c03::22f]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a3E1h-0005cI-RG for linux-arm-kernel@lists.infradead.org; Mon, 30 Nov 2015 02:17:15 +0000 Received: by pabfh17 with SMTP id fh17so173108949pab.0 for ; Sun, 29 Nov 2015 18:16:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=to2iS3FFmyXZ5mFtKJIHtDJ5bGUEY24ZGOgWI36qGWw=; b=cs5JZwuNnSf8s019TZ854CmWVS7iG0+6G+Db7GKWao9XYdZeCg/S1ZHugFvrIU4gDn bFXT1tVptVRJTHu74zqp6f9WSDEHcn5HP+GF39PFAfSkbyawoUZN9SIPYp0G0zB3RXAy PhoUq1262a14r1b4P32ytqQFx8hBXkFmSJrFSwankfEWUdP5VIjdKmtbS7dZoJBRzgS1 zzKCj6RYUuXZGAhDHnTbAsOKRhdPjJTfb1Z3fgZ+dCk/iApgC2YBgnsA2hxfugeYpu2J Bq3N53sQdaCgJBmwV6letC7QaldWWX/N4qpt8fP8DT9v0deZj1sRt+C6EGxOQfQQQYc/ IyNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=to2iS3FFmyXZ5mFtKJIHtDJ5bGUEY24ZGOgWI36qGWw=; b=UQ47gM1Br3GymMUBPSdipKzO8IBiYil7Vc3IUQNnZjtGLtMOZ4Zpzp34SXAAWv04rr qJc1jeGDYpSREkUthEHPH2iyUK5Va5BXrDMqCaTsuU0CJN3LeAF6cIjQrR0BSBP2lBg1 04fASH1XIs+Lk1vDYN9ORcTzZ3m0myQUoCSR4fZHfkoBenVuKB/zNP+m9YVZK17KaRkH GvzTZgoc8uZQe+NFAYH3Jn7qLkEl7gS/8F+sepHc3eT0kMCyvLBlmXo4lRawkY3SqPX0 fZPXdFFB70QLRySSJ1XzOjSQOmUlMBLvmrsZamXeWcgtWQNL051YPPs9RWf5H5NS0VAI YZ0A== X-Gm-Message-State: ALoCoQkaJWBz+kybzUQsoufjwAhjTNSjs4PloGTx2vXEEvHOBRL0rJUj8lhIon3hDSXjSfO9aGKS X-Received: by 10.98.66.152 with SMTP id h24mr67769703pfd.52.1448849813455; Sun, 29 Nov 2015 18:16:53 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id n16sm47168818pfa.53.2015.11.29.18.16.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 29 Nov 2015 18:16:52 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, alexander.shishkin@linux.intel.com Subject: [PATCH V5 12/26] coresight: etm3x: consolidating initial config Date: Sun, 29 Nov 2015 19:14:33 -0700 Message-Id: <1448849687-5724-13-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1448849687-5724-1-git-send-email-mathieu.poirier@linaro.org> References: <1448849687-5724-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151129_181714_115050_D6A7E43C X-CRM114-Status: GOOD ( 12.56 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, Mathieu Poirier , pawel.moll@arm.com, linux-doc@vger.kernel.org, fainelli@broadcom.com, linux-kernel@vger.kernel.org, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is really no point in having two functions to take care of doing the initials tracer configuration. As such moving everything to 'etm_set_default()'. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 37 ++++++++++----------------- 1 file changed, 14 insertions(+), 23 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index cfaf8e840bd6..14927da0f6ba 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -41,7 +41,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO); /* The number of ETM/PTM currently registered */ static int etm_count; static struct etm_drvdata *etmdrvdata[NR_CPUS]; -static void etm_init_default_data(struct etm_config *config); /* * Memory mapped writes to clear os lock are not supported on some processors @@ -199,7 +198,7 @@ struct etm_config *get_etm_config(struct etm_drvdata *drvdata) return NULL; /* Set default config */ - etm_init_default_data(config); + etm_set_default(config); drvdata->config = config; out: return drvdata->config; @@ -212,6 +211,19 @@ void etm_set_default(struct etm_config *config) if (WARN_ON_ONCE(!config)) return; + /* + * Taken verbatim from the TRM: + * + * To trace all memory: + * set bit [24] in register 0x009, the ETMTECR1, to 1 + * set all other bits in register 0x009, the ETMTECR1, to 0 + * set all bits in register 0x007, the ETMTECR2, to 0 + * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). + */ + config->enable_ctrl1 = BIT(24); + config->enable_ctrl2 = 0x0; + config->enable_event = ETM_HARD_WIRE_RES_A; + config->trigger_event = ETM_DEFAULT_EVENT_VAL; config->enable_event = ETM_HARD_WIRE_RES_A; @@ -606,27 +618,6 @@ static void etm_init_arch_data(void *info) CS_LOCK(drvdata->base); } -static void etm_init_default_data(struct etm_config *config) -{ - if (WARN_ON_ONCE(!config)) - return; - - etm_set_default(config); - - /* - * Taken verbatim from the TRM: - * - * To trace all memory: - * set bit [24] in register 0x009, the ETMTECR1, to 1 - * set all other bits in register 0x009, the ETMTECR1, to 0 - * set all bits in register 0x007, the ETMTECR2, to 0 - * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). - */ - config->enable_ctrl1 = BIT(24); - config->enable_ctrl2 = 0x0; - config->enable_event = ETM_HARD_WIRE_RES_A; -} - static void etm_init_trace_id(struct etm_drvdata *drvdata) { /*