From patchwork Fri Dec 18 14:18:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 7886001 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E4CC4BEEE5 for ; Fri, 18 Dec 2015 14:51:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0541120306 for ; Fri, 18 Dec 2015 14:51:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D13220160 for ; Fri, 18 Dec 2015 14:51:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a9wMY-0006Xd-GP; Fri, 18 Dec 2015 14:50:30 +0000 Received: from mail-wm0-x22a.google.com ([2a00:1450:400c:c09::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a9vtE-0007lw-D4 for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2015 14:20:16 +0000 Received: by mail-wm0-x22a.google.com with SMTP id p187so66518749wmp.0 for ; Fri, 18 Dec 2015 06:19:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2A7rM97wo3VEYhg/yo2Gf/qeuR4H/5BSB+69Tr0Wx9U=; b=Y7Sc1EZf9oOgUeO+rXeC3v5KKTceC2b+ex6QJCq/m8BbnfS7JAf1JurBT2bTmT3i0U j2QmnTsUdifi0c+LV3JNmMGE+GS4nrfSXQQ6Fys0ntrQ4QuqmSfzDtOB+bts1855+fO3 U6BS2xxeo/ShsxO5SEEEJjV+8H5oO5/JKSeyo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2A7rM97wo3VEYhg/yo2Gf/qeuR4H/5BSB+69Tr0Wx9U=; b=JkvuhFRooi7eMO0eIb48/LaE7DvhMP5lwVHVw7FZIOgsDn/OwOLnSH9w4kY0ZI/SdP tjAdUfOGVVl+qOfvVpauH2w2xee4IEG7PfdaTV81DW+RQYOUsfpv01KvmSxnfEh3cPf3 ZpB5yGCdzvEERvFvjpkNyyQlgRNhW06j2V66CsIVVwrHSPdOL8nQOmZQa9agkgU8h4+Z JEFqHyPvHkT5dk/l8w4A6Gg84sx6PZKOPcF99oZF/g3+jNs42x3JbwdDRXMzoD2kWgFn 2ErCB3l1MNa2TuezaP5oJ2yX3sCf6I97Iv43CBXB5HrJkw/sej+9RoV1KW4mu3SkP6sk iEww== X-Gm-Message-State: ALoCoQk5iULCK4rjDFYr2ScalVdXPgxG7bPimwMPCR0G1h4fgt2UN20fn60b9TBHVYzE/QmSYe+ErR+wmGtDSrBIwcapoM/C0A== X-Received: by 10.28.59.66 with SMTP id i63mr3484035wma.103.1450448391058; Fri, 18 Dec 2015 06:19:51 -0800 (PST) Received: from localhost.localdomain ([78.210.255.2]) by smtp.gmail.com with ESMTPSA id ql10sm15010027wjc.23.2015.12.18.06.19.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Dec 2015 06:19:50 -0800 (PST) From: Daniel Lezcano To: tglx@linutronix.de Subject: [PATCH 58/69] clocksource/drivers/dw_apb_timer: Fix apbt_readl return types Date: Fri, 18 Dec 2015 15:18:11 +0100 Message-Id: <1450448302-27429-58-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1450448302-27429-1-git-send-email-daniel.lezcano@linaro.org> References: <5672CB9E.7090707@linaro.org> <1450448302-27429-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151218_062012_869711_3550C3AB X-CRM114-Status: GOOD ( 13.11 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jisheng Zhang , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mingo@kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jisheng Zhang On Marvell BG4CT platform, we observed the __apbt_read_clocksource() return wrong value: Let's assume the APBTMR_N_CURRENT_VALUE value is 0xf0000000, we got 0xffffffff0fffffff, but it should be 0xfffffff. This issue should be common on all 64bit platforms. We fix the issue by letting aptb_readl() return u32. apbt_writel() is also updated to write u32 val rather than unsigned long. Signed-off-by: Jisheng Zhang Signed-off-by: Daniel Lezcano --- drivers/clocksource/dw_apb_timer.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c index c76c750..3a6d9db 100644 --- a/drivers/clocksource/dw_apb_timer.c +++ b/drivers/clocksource/dw_apb_timer.c @@ -49,12 +49,12 @@ clocksource_to_dw_apb_clocksource(struct clocksource *cs) return container_of(cs, struct dw_apb_clocksource, cs); } -static unsigned long apbt_readl(struct dw_apb_timer *timer, unsigned long offs) +static u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) { return readl(timer->base + offs); } -static void apbt_writel(struct dw_apb_timer *timer, unsigned long val, +static void apbt_writel(struct dw_apb_timer *timer, u32 val, unsigned long offs) { writel(val, timer->base + offs); @@ -62,7 +62,7 @@ static void apbt_writel(struct dw_apb_timer *timer, unsigned long val, static void apbt_disable_int(struct dw_apb_timer *timer) { - unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL); + u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); ctrl |= APBTMR_CONTROL_INT; apbt_writel(timer, ctrl, APBTMR_N_CONTROL); @@ -103,7 +103,7 @@ static irqreturn_t dw_apb_clockevent_irq(int irq, void *data) static void apbt_enable_int(struct dw_apb_timer *timer) { - unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL); + u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); /* clear pending intr */ apbt_readl(timer, APBTMR_N_EOI); ctrl &= ~APBTMR_CONTROL_INT; @@ -113,7 +113,7 @@ static void apbt_enable_int(struct dw_apb_timer *timer) static int apbt_shutdown(struct clock_event_device *evt) { struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt); - unsigned long ctrl; + u32 ctrl; pr_debug("%s CPU %d state=shutdown\n", __func__, cpumask_first(evt->cpumask)); @@ -127,7 +127,7 @@ static int apbt_shutdown(struct clock_event_device *evt) static int apbt_set_oneshot(struct clock_event_device *evt) { struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt); - unsigned long ctrl; + u32 ctrl; pr_debug("%s CPU %d state=oneshot\n", __func__, cpumask_first(evt->cpumask)); @@ -160,7 +160,7 @@ static int apbt_set_periodic(struct clock_event_device *evt) { struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt); unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ); - unsigned long ctrl; + u32 ctrl; pr_debug("%s CPU %d state=periodic\n", __func__, cpumask_first(evt->cpumask)); @@ -196,7 +196,7 @@ static int apbt_resume(struct clock_event_device *evt) static int apbt_next_event(unsigned long delta, struct clock_event_device *evt) { - unsigned long ctrl; + u32 ctrl; struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt); /* Disable timer */ @@ -323,7 +323,7 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs) * start count down from 0xffff_ffff. this is done by toggling the * enable bit then load initial load count to ~0. */ - unsigned long ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL); + u32 ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL); ctrl &= ~APBTMR_CONTROL_ENABLE; apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); @@ -338,7 +338,7 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs) static cycle_t __apbt_read_clocksource(struct clocksource *cs) { - unsigned long current_count; + u32 current_count; struct dw_apb_clocksource *dw_cs = clocksource_to_dw_apb_clocksource(cs);