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[82.33.25.72]) by smtp.gmail.com with ESMTPSA id i84sm16913134wmc.20.2015.12.20.12.53.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 20 Dec 2015 12:53:06 -0800 (PST) From: Daniel Thompson To: Thomas Gleixner , Jason Cooper , Russell King , Marc Zyngier Subject: [PATCH 4.4-rc5 v22 4/4] ARM: Allow IPI_CPU_BACKTRACE to exploit FIQ Date: Sun, 20 Dec 2015 20:52:37 +0000 Message-Id: <1450644757-18734-5-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1450644757-18734-1-git-send-email-daniel.thompson@linaro.org> References: <1450644757-18734-1-git-send-email-daniel.thompson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151220_125331_285178_D0F1EDB9 X-CRM114-Status: GOOD ( 17.85 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Petr Mladek , Daniel Thompson , linaro-kernel@lists.linaro.org, patches@linaro.org, Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Steven Rostedt , Sumit Semwal , Dmitry Pervushin , Dirk Behme , John Stultz , Tim Sander , Daniel Drake , Stephen Boyd , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The GIC (v1 & v2) driver allows its implementation of handle_arch_irq() to be called from the FIQ handler but currently the ARM code is not able to exploit this. Extend handle_fiq_as_nmi() to call handle_arch_irq(). This will affect all interrupt controllers, including ones that do not support FIQ. This is OK because a spurious FIQ is normally fatal. Handling a spurious FIQ like a normal interrupt does risk deadlock but does give us a chance of surviving long enough to get an error message out. We also extend the SMP code to indicate to irq drivers which IPIs they should seek to implement using FIQ. Signed-off-by: Daniel Thompson --- arch/arm/include/asm/smp.h | 9 +++++++++ arch/arm/kernel/smp.c | 6 ++++++ arch/arm/kernel/traps.c | 9 ++++++++- 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 3d6dc8b460e4..daf869cff02e 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -18,6 +18,15 @@ # error " included in non-SMP build" #endif +/* + * Identify which IPIs are safe for the irqchip to handle using FIQ. + * + * This information is advisory. The interrupt controller may not be capable + * of routing these IPIs to FIQ and the kernel will continue to work if they + * are routed to IRQ as normal. + */ +#define SMP_IPI_FIQ_MASK 0x80 + #define raw_smp_processor_id() (current_thread_info()->cpu) struct seq_file; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index fe517f1e88d8..853089e1aa8a 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -639,6 +639,11 @@ void handle_IPI(int ipinr, struct pt_regs *regs) break; case IPI_CPU_BACKTRACE: + if (in_nmi()) { + nmi_cpu_backtrace(regs); + break; + } + irq_enter(); nmi_cpu_backtrace(regs); irq_exit(); @@ -750,6 +755,7 @@ static void raise_nmi(cpumask_t *mask) if (cpumask_test_cpu(smp_processor_id(), mask) && irqs_disabled()) nmi_cpu_backtrace(NULL); + BUILD_BUG_ON(SMP_IPI_FIQ_MASK != BIT(IPI_CPU_BACKTRACE)); smp_cross_call(mask, IPI_CPU_BACKTRACE); } diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index bc698383e822..a04426ee7684 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -479,7 +479,14 @@ asmlinkage void __exception_irq_entry handle_fiq_as_nmi(struct pt_regs *regs) nmi_enter(); - /* nop. FIQ handlers for special arch/arm features can be added here. */ + /* + * Either the interrupt controller supports FIQ, meaning it will + * do the right thing with this call, or we will end up treating a + * spurious FIQ (which is normally fatal) as though it were an IRQ + * which, although it risks deadlock, still gives us a sporting + * chance of surviving long enough to log errors. + */ + handle_arch_irq(regs); nmi_exit();