From patchwork Wed Jan 6 04:03:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 7964541 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 59DB8BEEE5 for ; Wed, 6 Jan 2016 04:09:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 89B842022A for ; Wed, 6 Jan 2016 04:09:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B14A320212 for ; Wed, 6 Jan 2016 04:09:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aGfNN-0007Ik-53; Wed, 06 Jan 2016 04:07:09 +0000 Received: from mail-pf0-f182.google.com ([209.85.192.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aGfKy-0003UD-7n; Wed, 06 Jan 2016 04:05:56 +0000 Received: by mail-pf0-f182.google.com with SMTP id q63so195500769pfb.0; Tue, 05 Jan 2016 20:04:19 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5jCpZLVbC0J6Uy/X58FhwTvLnnHC4bZlxJUqkbciP0w=; b=mBRiFNBzqzjxZhNISk34r7HnNNd/DGF62POva3MvLKRpbXf8x56RIzJPTJIWhG3jUG uctjPqvJyNpbfJtmNRJOgroSfBQnnScpL2LLOW9e8XD3XDcEqoEHbIvtJYIxoRTu1Jfi RQT8MKkumkPi2lLP3wRqQP4BPv+CM3M0EOt3BKVkAGPk18q8rlGZQeZEOORKC14iDPgK PjuPAhp+qTXa2P9awLa5k2KbvqIyCHAl3467ocTnKCc54AkJaNQWyQXwxqeQFGxGyPNC 1Nm8ZsCNpuxUL08az3OTbQ6VdQ7pbqk1Op29wefsbsGnx/JEw6YtA9lLVLF6TQXasWL/ mvpw== X-Received: by 10.98.12.218 with SMTP id 87mr80804850pfm.54.1452053059106; Tue, 05 Jan 2016 20:04:19 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id c87sm33242672pfj.79.2016.01.05.20.04.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Jan 2016 20:04:18 -0800 (PST) From: Chris Zhong To: heiko@sntech.de, linux-rockchip@lists.infradead.org, mark.yao@rock-chips.com, treding@nvidia.com Subject: [PATCH v7 2/5] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver Date: Wed, 6 Jan 2016 12:03:54 +0800 Message-Id: <1452053038-32098-3-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1452053038-32098-1-git-send-email-zyw@rock-chips.com> References: <1452053038-32098-1-git-send-email-zyw@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160105_200441_379461_4939B05B X-CRM114-Status: GOOD ( 12.79 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, Rob Herring , Kumar Gala , Chris Zhong , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver Signed-off-by: Chris Zhong Acked-by: Rob Herring --- Changes in v7: None Changes in v6: - update the document, since the bridge device has been deleted. Changes in v5: None Changes in v4: None Changes in v3: - move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/ .../display/rockchip/dw_mipi_dsi_rockchip.txt | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt new file mode 100644 index 0000000..1753f0c --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -0,0 +1,60 @@ +Rockchip specific extensions to the Synopsys Designware MIPI DSI +================================ + +Required properties: +- #address-cells: Should be <1>. +- #size-cells: Should be <0>. +- compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi". +- reg: Represent the physical address range of the controller. +- interrupts: Represent the controller's interrupt to the CPU(s). +- clocks, clock-names: Phandles to the controller's pll reference + clock(ref) and APB clock(pclk), as described in [1]. +- rockchip,grf: this soc should set GRF regs to mux vopl/vopb. +- ports: contain a port node with endpoint definitions as defined in [2]. + For vopb,set the reg = <0> and set the reg = <1> for vopl. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/media/video-interfaces.txt + +Example: + mipi_dsi: mipi@ff960000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0xff960000 0x4000>; + interrupts = ; + clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>; + clock-names = "ref", "pclk"; + rockchip,grf = <&grf>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + mipi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_mipi>; + }; + mipi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_mipi>; + }; + }; + }; + + panel { + compatible ="boe,tv080wum-nl0"; + reg = <0>; + + enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_en>; + backlight = <&backlight>; + status = "okay"; + }; + };