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Thu, 07 Jan 2016 23:40:49 +0000 Received: from mail-bl2on0085.outbound.protection.outlook.com ([65.55.169.85] helo=na01-bl2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHK9L-0001ld-44 for linux-arm-kernel@lists.infradead.org; Thu, 07 Jan 2016 23:39:30 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Yuri.Norov@caviumnetworks.com; Received: from localhost (95.143.213.121) by CO2PR07MB620.namprd07.prod.outlook.com (10.141.228.156) with Microsoft SMTP Server (TLS) id 15.1.361.13; Thu, 7 Jan 2016 23:39:00 +0000 From: Yury Norov To: , , , Subject: [PATCH v6 09/21] arm64: ilp32: add is_ilp32_compat_{task, thread} and TIF_32BIT_AARCH64 Date: Fri, 8 Jan 2016 02:34:27 +0300 Message-ID: <1452209679-19445-10-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1452209679-19445-1-git-send-email-ynorov@caviumnetworks.com> References: <1452209679-19445-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [95.143.213.121] X-ClientProxiedBy: AM3PR01CA039.eurprd01.prod.exchangelabs.com (10.141.191.29) To CO2PR07MB620.namprd07.prod.outlook.com (10.141.228.156) X-Microsoft-Exchange-Diagnostics: 1; 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X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pinskia@gmail.com, Prasun.Kapoor@caviumnetworks.com, schwab@suse.de, broonie@kernel.org, Nathan_Lynch@mentor.com, agraf@suse.de, klimov.linux@gmail.com, Andrew Pinski , ynorov@caviumnetworks.com, jan.dakinevich@gmail.com, ddaney.cavm@gmail.com, bamvor.zhangjian@huawei.com, philipp.tomsich@theobroma-systems.com, joseph@codesourcery.com, christoph.muellner@theobroma-systems.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAD_ENC_HEADER,BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ILP32 tasks are needed to be distinguished from lp64 and aarch32. This patch adds helper functions is_ilp32_compat_{task,thread} and thread flag TIF_32BIT_AARCH64 to address it. This is a preparation for following patches in ilp32 patchset. For consistency, SET_PERSONALITY are changed here accordingly. Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Yury Norov Reviewed-by: David Daney --- arch/arm64/include/asm/elf.h | 13 +++++++++++-- arch/arm64/include/asm/is_compat.h | 28 +++++++++++++++++++++++++++- arch/arm64/include/asm/thread_info.h | 1 + 3 files changed, 39 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index 2f62ded..5e27a64 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -135,7 +135,11 @@ typedef struct user_fpsimd_state elf_fpregset_t; */ #define ELF_PLAT_INIT(_r, load_addr) (_r)->regs[0] = 0 -#define SET_PERSONALITY(ex) clear_thread_flag(TIF_32BIT); +#define SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + clear_thread_flag(TIF_32BIT); \ +} while (0) #define ARCH_DLINFO \ do { \ @@ -174,7 +178,12 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; ((x)->e_flags & EF_ARM_EABI_MASK)) #define compat_start_thread compat_start_thread -#define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); +#define COMPAT_SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + set_thread_flag(TIF_32BIT); \ +} while (0) + #define COMPAT_ARCH_DLINFO extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp); diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h index 6139b5a..55134cf 100644 --- a/arch/arm64/include/asm/is_compat.h +++ b/arch/arm64/include/asm/is_compat.h @@ -45,11 +45,37 @@ static inline int is_a32_compat_thread(struct thread_info *thread) #endif /* CONFIG_AARCH32_EL0 */ +#ifdef CONFIG_ARM64_ILP32 + +static inline int is_ilp32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT_AARCH64); +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT_AARCH64); +} + +#else + +static inline int is_ilp32_compat_task(void) +{ + return 0; +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_ARM64_ILP32 */ + #ifdef CONFIG_COMPAT static inline int is_compat_task(void) { - return is_a32_compat_task(); + return is_a32_compat_task() || is_ilp32_compat_task(); } #endif /* CONFIG_COMPAT */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index dd046c5..c74d4f5 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -113,6 +113,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 #define TIF_32BIT 22 /* AARCH32 process */ +#define TIF_32BIT_AARCH64 23 /* 32 bit process on AArch64 (ILP32) */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)