From patchwork Fri Jan 8 03:32:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Liao X-Patchwork-Id: 7982391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A9A659F32E for ; Fri, 8 Jan 2016 03:35:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9171C2013D for ; Fri, 8 Jan 2016 03:35:33 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82D0520138 for ; Fri, 8 Jan 2016 03:35:32 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHNoY-0000nD-8P; Fri, 08 Jan 2016 03:34:10 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHNnz-0000aP-UY; Fri, 08 Jan 2016 03:33:38 +0000 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 721508599; Fri, 08 Jan 2016 11:33:13 +0800 Received: from mtksdtcf04.mediatek.inc (10.21.12.144) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Fri, 8 Jan 2016 11:33:12 +0800 From: James Liao To: Matthias Brugger , Sascha Hauer Subject: [PATCH v2 4/4] soc: mediatek: Add MT2701 scpsys driver Date: Fri, 8 Jan 2016 11:32:48 +0800 Message-ID: <1452223968-6566-5-git-send-email-jamesjj.liao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452223968-6566-1-git-send-email-jamesjj.liao@mediatek.com> References: <1452223968-6566-1-git-send-email-jamesjj.liao@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160107_193336_377132_B053EA10 X-CRM114-Status: GOOD ( 23.51 ) X-Spam-Score: -1.1 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Kevin Hilman , linux-kernel@vger.kernel.org, Daniel Kurtz , linux-mediatek@lists.infradead.org, Shunli Wang , James Liao , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shunli Wang Add scpsys driver for MT2701. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/soc/mediatek/Kconfig | 11 ++ drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/mtk-scpsys-mt2701.c | 172 +++++++++++++++++++++++++++++++ 3 files changed, 184 insertions(+) create mode 100644 drivers/soc/mediatek/mtk-scpsys-mt2701.c diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig index 87a6e61..b1e858e 100644 --- a/drivers/soc/mediatek/Kconfig +++ b/drivers/soc/mediatek/Kconfig @@ -38,3 +38,14 @@ config MTK_SCPSYS_MT8173 driver. The System Control Processor System (SCPSYS) has several power management related tasks in the system. + +config MTK_SCPSYS_MT2701 + bool "SCPSYS Support MediaTek MT2701" + depends on ARCH_MEDIATEK || COMPILE_TEST + select MTK_SCPSYS + default ARCH_MEDIATEK + help + Say yes here to add support for the MT2701 SCPSYS power domain + driver. + The System Control Processor System (SCPSYS) has several power + management related tasks in the system. diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile index 3b22baa..822986d 100644 --- a/drivers/soc/mediatek/Makefile +++ b/drivers/soc/mediatek/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o obj-$(CONFIG_MTK_SCPSYS_MT8173) += mtk-scpsys-mt8173.o +obj-$(CONFIG_MTK_SCPSYS_MT2701) += mtk-scpsys-mt2701.o diff --git a/drivers/soc/mediatek/mtk-scpsys-mt2701.c b/drivers/soc/mediatek/mtk-scpsys-mt2701.c new file mode 100644 index 0000000..b7a645c --- /dev/null +++ b/drivers/soc/mediatek/mtk-scpsys-mt2701.c @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2015 Mediatek, Shunli Wang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include + +#include "mtk-scpsys.h" + +#define SPM_VDE_PWR_CON 0x0210 +#define SPM_MFG_PWR_CON 0x0214 +#define SPM_ISP_PWR_CON 0x0238 +#define SPM_DIS_PWR_CON 0x023C +#define SPM_CONN_PWR_CON 0x0280 +#define SPM_BDP_PWR_CON 0x029C +#define SPM_ETH_PWR_CON 0x02A0 +#define SPM_HIF_PWR_CON 0x02A4 +#define SPM_IFR_MSC_PWR_CON 0x02A8 +#define SPM_PWR_STATUS 0x060c +#define SPM_PWR_STATUS_2ND 0x0610 + +#define CONN_PWR_STA_MASK BIT(1) +#define DIS_PWR_STA_MASK BIT(3) +#define MFG_PWR_STA_MASK BIT(4) +#define ISP_PWR_STA_MASK BIT(5) +#define VDE_PWR_STA_MASK BIT(7) +#define BDP_PWR_STA_MASK BIT(14) +#define ETH_PWR_STA_MASK BIT(15) +#define HIF_PWR_STA_MASK BIT(16) +#define IFR_MSC_PWR_STA_MASK BIT(17) + +#define MT2701_TOP_AXI_PROT_EN_CONN 0x0104 +#define MT2701_TOP_AXI_PROT_EN_DISP 0x0002 + +static const struct scp_domain_data scp_domain_data[] = { + [MT2701_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = CONN_PWR_STA_MASK, + .ctl_offs = SPM_CONN_PWR_CON, + .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN, + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_DISP] = { + .name = "disp", + .sta_mask = DIS_PWR_STA_MASK, + .ctl_offs = SPM_DIS_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .clk_id = {CLK_MM}, + .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_DISP, + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = MFG_PWR_STA_MASK, + .ctl_offs = SPM_MFG_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_VDEC] = { + .name = "vdec", + .sta_mask = VDE_PWR_STA_MASK, + .ctl_offs = SPM_VDE_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .clk_id = {CLK_MM}, + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_ISP] = { + .name = "isp", + .sta_mask = ISP_PWR_STA_MASK, + .ctl_offs = SPM_ISP_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_BDP] = { + .name = "bdp", + .sta_mask = BDP_PWR_STA_MASK, + .ctl_offs = SPM_BDP_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_ETH] = { + .name = "eth", + .sta_mask = ETH_PWR_STA_MASK, + .ctl_offs = SPM_ETH_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_HIF] = { + .name = "hif", + .sta_mask = HIF_PWR_STA_MASK, + .ctl_offs = SPM_HIF_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .active_wakeup = true, + }, + [MT2701_POWER_DOMAIN_IFR_MSC] = { + .name = "ifr_msc", + .sta_mask = IFR_MSC_PWR_STA_MASK, + .ctl_offs = SPM_IFR_MSC_PWR_CON, + .active_wakeup = true, + }, +}; + +#define NUM_DOMAINS ARRAY_SIZE(scp_domain_data) + +static int __init scpsys_probe(struct platform_device *pdev) +{ + struct scp *scp; + + scp = init_scp(pdev, scp_domain_data, NUM_DOMAINS); + if (IS_ERR(scp)) + return PTR_ERR(scp); + + mtk_register_power_domains(pdev, scp, NUM_DOMAINS); + + return 0; +} + +static const struct of_device_id of_scpsys_match_tbl[] = { + { + .compatible = "mediatek,mt2701-scpsys", + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, of_scpsys_match_tbl); + +static struct platform_driver scpsys_drv = { + .driver = { + .name = "mtk-scpsys-mt2701", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(of_scpsys_match_tbl), + }, + .probe = scpsys_probe, +}; + +static int __init scpsys_init(void) +{ + return platform_driver_register(&scpsys_drv); +} + +/* + * There are some Mediatek drivers which depend on the power domain driver need + * to probe in earlier initcall levels. So scpsys driver also need to probe + * earlier. + * + * IOMMU(M4U) and SMI drivers for example. SMI is a bridge between IOMMU and + * multimedia HW. IOMMU depends on SMI, and SMI is a power domain consumer, + * so the proper probe sequence should be scpsys -> SMI -> IOMMU driver. + * IOMMU drivers are initialized during subsys_init by default, so we need to + * move SMI and scpsys drivers to subsys_init or earlier init levels. + */ +subsys_initcall(scpsys_init); + +MODULE_DESCRIPTION("MediaTek MT2701 scpsys driver"); +MODULE_LICENSE("GPL v2");