From patchwork Fri Jan 8 11:31:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zhengxing X-Patchwork-Id: 7984911 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2804B9F744 for ; Fri, 8 Jan 2016 11:34:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3B60E2017D for ; Fri, 8 Jan 2016 11:34:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B603320172 for ; Fri, 8 Jan 2016 11:34:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHVHU-0000UR-Up; Fri, 08 Jan 2016 11:32:32 +0000 Received: from regular1.263xmail.com ([211.150.99.131]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHVHC-0000CC-Gd; Fri, 08 Jan 2016 11:32:17 +0000 Received: from zhengxing?rock-chips.com (unknown [192.168.167.229]) by regular1.263xmail.com (Postfix) with SMTP id B16233C92; Fri, 8 Jan 2016 19:31:46 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 54978431; Fri, 8 Jan 2016 19:31:44 +0800 (CST) X-RL-SENDER: zhengxing@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhengxing@rock-chips.com X-UNIQUE-TAG: <7923a228e50b3bf4f05b6c53449aabe0> X-ATTACHMENT-NUM: 0 X-SENDER: zhengxing@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 1696SMEKA7; Fri, 08 Jan 2016 19:31:45 +0800 (CST) From: Xing Zheng To: linux-rockchip@lists.infradead.org Subject: [RESEND RFC PATCH 1/2] clk: rockchip: rk3036: Add to 100MHz integer multiples of cpu freq table Date: Fri, 8 Jan 2016 19:31:37 +0800 Message-Id: <1452252698-16765-2-git-send-email-zhengxing@rock-chips.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1452252698-16765-1-git-send-email-zhengxing@rock-chips.com> References: <1452252698-16765-1-git-send-email-zhengxing@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160108_033215_891455_ED40214C X-CRM114-Status: UNSURE ( 7.39 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heiko@sntech.de, Xing Zheng , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, keescook@google.com, linux-clk@vger.kernel.org, leozwang@google.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We need the cpu changing freqs capability, and considering that emac ref which is need 50MHz might is under the APLL, meanwhile, we don't need too many freqs because it may spend more time to find the correct freq. Therefore, we should add 100MHz integer multiples cpu freqs for emac. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3036.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index bf9dd9b..f60273c 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -32,18 +32,22 @@ enum rk3036_plls { static struct rockchip_pll_rate_table rk3036_pll_rates[] = { /* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */ RK3036_PLL_RATE(1608000000, 1, 67, 1, 1, 1, 0), + RK3036_PLL_RATE(1600000000, 6, 400, 1, 1, 1, 0), RK3036_PLL_RATE(1584000000, 1, 66, 1, 1, 1, 0), RK3036_PLL_RATE(1560000000, 1, 65, 1, 1, 1, 0), RK3036_PLL_RATE(1536000000, 1, 64, 1, 1, 1, 0), RK3036_PLL_RATE(1512000000, 1, 63, 1, 1, 1, 0), + RK3036_PLL_RATE(1500000000, 6, 375, 1, 1, 1, 0), RK3036_PLL_RATE(1488000000, 1, 62, 1, 1, 1, 0), RK3036_PLL_RATE(1464000000, 1, 61, 1, 1, 1, 0), RK3036_PLL_RATE(1440000000, 1, 60, 1, 1, 1, 0), RK3036_PLL_RATE(1416000000, 1, 59, 1, 1, 1, 0), + RK3036_PLL_RATE(1400000000, 6, 350, 1, 1, 1, 0), RK3036_PLL_RATE(1392000000, 1, 58, 1, 1, 1, 0), RK3036_PLL_RATE(1368000000, 1, 57, 1, 1, 1, 0), RK3036_PLL_RATE(1344000000, 1, 56, 1, 1, 1, 0), RK3036_PLL_RATE(1320000000, 1, 55, 1, 1, 1, 0), + RK3036_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0), RK3036_PLL_RATE(1296000000, 1, 54, 1, 1, 1, 0), RK3036_PLL_RATE(1272000000, 1, 53, 1, 1, 1, 0), RK3036_PLL_RATE(1248000000, 1, 52, 1, 1, 1, 0), @@ -70,8 +74,12 @@ static struct rockchip_pll_rate_table rk3036_pll_rates[] = { RK3036_PLL_RATE( 504000000, 1, 63, 3, 1, 1, 0), RK3036_PLL_RATE( 500000000, 6, 250, 2, 1, 1, 0), RK3036_PLL_RATE( 408000000, 1, 68, 2, 2, 1, 0), + RK3036_PLL_RATE( 400000000, 1, 100, 3, 2, 1, 0), RK3036_PLL_RATE( 312000000, 1, 52, 2, 2, 1, 0), + RK3036_PLL_RATE( 300000000, 1, 50, 2, 2, 1, 0), RK3036_PLL_RATE( 216000000, 1, 72, 4, 2, 1, 0), + RK3036_PLL_RATE( 200000000, 1, 50, 3, 2, 1, 0), + RK3036_PLL_RATE( 100000000, 6, 400, 4, 4, 1, 0), RK3036_PLL_RATE( 96000000, 1, 64, 4, 4, 1, 0), { /* sentinel */ }, }; @@ -104,9 +112,22 @@ static struct rockchip_pll_rate_table rk3036_pll_rates[] = { } static struct rockchip_cpuclk_rate_table rk3036_cpuclk_rates[] __initdata = { - RK3036_CPUCLK_RATE(816000000, 4), - RK3036_CPUCLK_RATE(600000000, 4), - RK3036_CPUCLK_RATE(312000000, 4), + RK3036_CPUCLK_RATE(1600000000, 8), + RK3036_CPUCLK_RATE(1500000000, 7), + RK3036_CPUCLK_RATE(1400000000, 7), + RK3036_CPUCLK_RATE(1300000000, 6), + RK3036_CPUCLK_RATE(1200000000, 6), + RK3036_CPUCLK_RATE(1100000000, 5), + RK3036_CPUCLK_RATE(1000000000, 5), + RK3036_CPUCLK_RATE( 900000000, 4), + RK3036_CPUCLK_RATE( 800000000, 4), + RK3036_CPUCLK_RATE( 700000000, 3), + RK3036_CPUCLK_RATE( 600000000, 3), + RK3036_CPUCLK_RATE( 500000000, 3), + RK3036_CPUCLK_RATE( 400000000, 3), + RK3036_CPUCLK_RATE( 300000000, 2), + RK3036_CPUCLK_RATE( 200000000, 1), + RK3036_CPUCLK_RATE( 100000000, 1), }; static const struct rockchip_cpuclk_reg_data rk3036_cpuclk_data = {