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[213.17.239.108]) by smtp.gmail.com with ESMTPSA id y124sm8858741wmg.3.2016.01.13.05.21.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jan 2016 05:21:50 -0800 (PST) From: Tomasz Nowicki To: bhelgaas@google.com, arnd@arndb.de, will.deacon@arm.com, catalin.marinas@arm.com, rjw@rjwysocki.net, hanjun.guo@linaro.org, Lorenzo.Pieralisi@arm.com, okaya@codeaurora.org, jiang.liu@linux.intel.com, Stefano.Stabellini@eu.citrix.com Subject: [PATCH V3 17/21] acpi, mcfg: Add default PCI config accessors implementation and initial support for related quirks. Date: Wed, 13 Jan 2016 14:21:03 +0100 Message-Id: <1452691267-32240-18-git-send-email-tn@semihalf.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452691267-32240-1-git-send-email-tn@semihalf.com> References: <1452691267-32240-1-git-send-email-tn@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160113_052212_386849_8BD2B30F X-CRM114-Status: GOOD ( 12.20 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jchandra@broadcom.com, jcm@redhat.com, linaro-acpi@lists.linaro.org, linux-pci@vger.kernel.org, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, robert.richter@caviumnetworks.com, Suravee.Suthikulpanit@amd.com, msalter@redhat.com, wangyijing@huawei.com, Tomasz Nowicki , tglx@linutronix.de, mw@semihalf.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We use generic accessors from access.c by default. However, we already know platforms that need special handling while accessing to PCI config space. These platforms will need different accessors set matched against platform ID, domain, bus touple. Therefore we are going to add (in future) DECLARE_ACPI_MCFG_FIXUP which will register platform specific custom accessors. For now we let pci_mcfg_get_ops takes domain and bus arguments and left some space for matching algorithm. Signed-off-by: Tomasz Nowicki --- drivers/acpi/mcfg.c | 30 ++++++++++++++++++++++++++++++ include/linux/pci-acpi.h | 8 ++++++++ 2 files changed, 38 insertions(+) diff --git a/drivers/acpi/mcfg.c b/drivers/acpi/mcfg.c index dca4c4e..dfc2d14 100644 --- a/drivers/acpi/mcfg.c +++ b/drivers/acpi/mcfg.c @@ -34,6 +34,36 @@ int __weak raw_pci_write(unsigned int domain, unsigned int bus, return PCIBIOS_DEVICE_NOT_FOUND; } +void __iomem * +pci_mcfg_dev_base(struct pci_bus *bus, unsigned int devfn, int offset) +{ + struct pci_mmcfg_region *cfg; + + cfg = pci_mmconfig_lookup(pci_domain_nr(bus), bus->number); + if (cfg && cfg->virt) + return cfg->virt + + (PCI_MMCFG_BUS_OFFSET(bus->number) | (devfn << 12)) + + offset; + return NULL; +} + +/* Default generic PCI config accessors */ +static struct pci_ops default_pci_mcfg_ops = { + .map_bus = pci_mcfg_dev_base, + .read = pci_generic_config_read, + .write = pci_generic_config_write, +}; + +struct pci_ops *pci_mcfg_get_ops(struct acpi_pci_root *root) +{ + /* + * TODO: Match against platform specific quirks and return + * corresponding PCI config space accessor set. + */ + + return &default_pci_mcfg_ops; +} + int __init acpi_parse_mcfg(struct acpi_table_header *header) { struct acpi_table_mcfg *mcfg; diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index c277415..45807a6 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -82,10 +82,18 @@ void acpi_pci_remove_bus(struct pci_bus *bus); #ifdef CONFIG_PCI_MMCONFIG int pci_mmcfg_setup_map(struct acpi_pci_root_info *ci); void pci_mmcfg_teardown_map(struct acpi_pci_root_info *ci); +struct pci_ops *pci_mcfg_get_ops(struct acpi_pci_root *root); +void __iomem * +pci_mcfg_dev_base(struct pci_bus *bus, unsigned int devfn, int offset); #else static inline int pci_mmcfg_setup_map(struct acpi_pci_root_info *ci) { return 0; } static inline void pci_mmcfg_teardown_map(struct acpi_pci_root_info *ci) { } +static inline struct pci_ops *pci_mcfg_get_ops(struct acpi_pci_root *root) +{ return NULL; } +static inline void __iomem * +pci_mcfg_dev_base(struct pci_bus *bus, unsigned int devfn, int offset) +{ return NULL; } #endif #ifdef CONFIG_ACPI_PCI_SLOT