From patchwork Tue Jan 19 14:17:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Potthuri X-Patchwork-Id: 8062851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B74619F818 for ; Tue, 19 Jan 2016 14:20:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DE32920434 for ; Tue, 19 Jan 2016 14:20:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C2468203FB for ; Tue, 19 Jan 2016 14:20:45 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aLX7v-0005kP-Mt; Tue, 19 Jan 2016 14:19:19 +0000 Received: from mail-bl2nam02on0079.outbound.protection.outlook.com ([104.47.38.79] helo=NAM02-BL2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aLX7e-0005Xw-US for linux-arm-kernel@lists.infradead.org; Tue, 19 Jan 2016 14:19:05 +0000 Received: from SN1NAM02FT002.eop-nam02.prod.protection.outlook.com (10.152.72.54) by SN1NAM02HT003.eop-nam02.prod.protection.outlook.com (10.152.73.16) with Microsoft SMTP Server (TLS) id 15.1.355.15; Tue, 19 Jan 2016 14:18:40 +0000 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.100 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.100; helo=xsj-pvapsmtpgw02; Received: from xsj-pvapsmtpgw02 (149.199.60.100) by SN1NAM02FT002.mail.protection.outlook.com (10.152.72.94) with Microsoft SMTP Server (TLS) id 15.1.355.15 via Frontend Transport; Tue, 19 Jan 2016 14:18:38 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66]:44545 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw02 with esmtp (Exim 4.63) (envelope-from ) id 1aLX7G-0001vs-5I; Tue, 19 Jan 2016 06:18:38 -0800 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1aLX7G-0001tF-0K; Tue, 19 Jan 2016 06:18:38 -0800 Received: from xsj-pvapsmtp01 (mailman.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id u0JEIW2a010408; Tue, 19 Jan 2016 06:18:32 -0800 Received: from [172.23.146.172] (helo=xhdl3764.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1aLX79-0001s5-Hd; Tue, 19 Jan 2016 06:18:31 -0800 Received: by xhdl3764.xilinx.com (Postfix, from userid 14964) id B37401A203C9; Tue, 19 Jan 2016 19:48:30 +0530 (IST) From: P L Sai Krishna To: Michal Simek , Soren Brinkmann , Ulf Hansson , Kevin Hao , Emil Lenchak , Tobias Klauser , Sudeep Holla , Adrian Hunter , Jisheng Zhang , "Ivan T. Ivanov" , Scott Branden , Vincent Yang , Haibo Chen , Marek Vasut , "ludovic.desroches@atmel.com" , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , "Kumar Gala" , Suman Tripathi , Shawn Lin Subject: [LINUX PATCH 1/5] mmc: Workaround for the issue in auto tuning mode. Date: Tue, 19 Jan 2016 19:47:31 +0530 Message-ID: <1453213055-35563-1-git-send-email-lakshmis@xilinx.com> X-Mailer: git-send-email 2.1.2 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22074.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009020)(979002)(6009001)(2980300002)(438002)(189002)(199003)(48376002)(229853001)(63266004)(52956003)(6806005)(5003940100001)(1220700001)(42186005)(586003)(103686003)(1096002)(50466002)(5008740100001)(50986999)(92566002)(19580395003)(19580405001)(86362001)(5001960100002)(33646002)(47776003)(45336002)(106466001)(189998001)(2501003)(11100500001)(36386004)(551934003)(2906002)(5001770100001)(87936001)(4326007)(90966002)(81156007)(36756003)(50226001)(46386002)(4001430100002)(107886002)(7059030)(921003)(107986001)(1121003)(5001870100001)(217873001)(969003)(989001)(999001)(1009001)(1019001); DIR:OUT; SFP:1101; SCL:1; SRVR:SN1NAM02HT003; H:xsj-pvapsmtpgw02; FPR:; SPF:Pass; PTR:unknown-60-100.xilinx.com,xapps1.xilinx.com; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 46cb880f-1752-4aba-2928-08d320db6d7d X-Exchange-Antispam-Report-Test: UriScan:; BCL:0; PCL:0; RULEID:(8251501002); SRVR:SN1NAM02HT003; UriScan:(192813158149592); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(5005006)(13023025)(520078)(13017025)(13024025)(13015025)(13018025)(8121501046)(3002001)(10201501046); SRVR:SN1NAM02HT003; BCL:0; PCL:0; RULEID:; SRVR:SN1NAM02HT003; X-Forefront-PRVS: 0826B2F01B X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jan 2016 14:18:38.6998 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.100]; Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT003 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160119_061903_252346_72E2C93C X-CRM114-Status: GOOD ( 17.98 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Harini Katakam , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, P L Sai Krishna , Anirudha Sarangi , Punnaiah Choudary Kalluri , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP During the auto tuning mode of SDR104, a couple of transactions on rx_tap_value which are not incremental or decremental by 1. Since the DLL supports only increment/decrement by 1 during dynamic change, observed unexpected delays during both these transactions. The first transaction occurs when the tap value reached 0x1F, it will reset to 0x0 and go till 0x7. This transaction can be avoided by changing the corecfg_dis1p5xtuningcnt to 1'b1 which is currently tied to 1'b0 in the RTL. The second transaction occurs after the tuning is completed. Once the tuning is done, the tuning fsm in the host controller calculates the average pattern match and will write the value on the rx tap value. Therefore observed a transaction from 0x7 to the final value which need not be a increment/decrement value. Because of this issue DLL tuning will not be accurate and SDR50, SDR104 & HS200 modes may not work. This patch adds workaround to change the SD clock after tuning done to provide accurate DLL tuning for SDR50, SD104 & HS200 modes. After receiving the tuning done, program "SDCLK Frequency Select" of clock control register with a value different from the desired value. Wait for the "Internal Clock Stable" bit of the clock control register and program the desired frequency. Signed-off-by: P L Sai Krishna --- drivers/mmc/host/sdhci-of-arasan.c | 18 ++++++++++++++++++ drivers/mmc/host/sdhci-pltfm.c | 3 +++ drivers/mmc/host/sdhci.c | 5 +++++ drivers/mmc/host/sdhci.h | 4 ++++ 4 files changed, 30 insertions(+) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 75379cb..7f30577 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -52,6 +52,23 @@ static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host) return freq; } +void arasan_tune_sdclk(struct sdhci_host *host) +{ + unsigned int clock; + + clock = host->clock; + + /* + * As per controller erratum, program the SDCLK Frequency + * Select of clock control register with a value, say + * clock/2. Wait for the Internal clock stable and program + * the desired frequency. + */ + host->ops->set_clock(host, clock/2); + + host->ops->set_clock(host, host->clock); +} + static struct sdhci_ops sdhci_arasan_ops = { .set_clock = sdhci_set_clock, .get_max_clock = sdhci_pltfm_clk_get_max_clock, @@ -59,6 +76,7 @@ static struct sdhci_ops sdhci_arasan_ops = { .set_bus_width = sdhci_set_bus_width, .reset = sdhci_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, + .tune_clk = arasan_tune_sdclk, }; static struct sdhci_pltfm_data sdhci_arasan_pdata = { diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 072bb27..223c5eb 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -90,6 +90,9 @@ void sdhci_get_of_property(struct platform_device *pdev) if (of_get_property(np, "no-1-8-v", NULL)) host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; + if (of_get_property(np, "broken-tuning", NULL)) + host->quirks2 |= SDHCI_QUIRK2_BROKEN_TUNING; + if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc")) host->quirks |= SDHCI_QUIRK_BROKEN_DMA; diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index d622435..8b064cd 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -2043,6 +2043,11 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) err = -EIO; } + if ((host->quirks2 & SDHCI_QUIRK2_BROKEN_TUNING) && + (tuning_loop_counter >= 0) && (ctrl & SDHCI_CTRL_TUNED_CLK)) { + host->ops->tune_clk(host); + } + out: if (tuning_count) { /* diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 7654ae5..16419f0 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -417,6 +417,9 @@ struct sdhci_host { #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) /* Broken Clock divider zero in controller */ #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) +/* Tuning Broken for HS200, SDR50 and SDR104 */ +#define SDHCI_QUIRK2_BROKEN_TUNING (1<<16) + /* * When internal clock is disabled, a delay is needed before modifying the * SD clock frequency or enabling back the internal clock. @@ -548,6 +551,7 @@ struct sdhci_ops { void (*platform_init)(struct sdhci_host *host); void (*card_event)(struct sdhci_host *host); void (*voltage_switch)(struct sdhci_host *host); + void (*tune_clk)(struct sdhci_host *host); int (*select_drive_strength)(struct sdhci_host *host, struct mmc_card *card, unsigned int max_dtr, int host_drv,