From patchwork Wed Jan 27 05:21:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 8130561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 36FD59F38B for ; Wed, 27 Jan 2016 05:24:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5B38D202F2 for ; Wed, 27 Jan 2016 05:24:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 751B5202E6 for ; Wed, 27 Jan 2016 05:24:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aOIZJ-000895-4e; Wed, 27 Jan 2016 05:23:01 +0000 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aOIYU-0007dJ-DL for linux-arm-kernel@lists.infradead.org; Wed, 27 Jan 2016 05:22:13 +0000 X-IronPort-AV: E=Sophos;i="5.22,353,1449561600"; d="scan'208";a="86526791" Received: from irvexchcas07.broadcom.com (HELO IRVEXCHCAS07.corp.ad.broadcom.com) ([10.9.208.55]) by mail-gw2-out.broadcom.com with ESMTP; 26 Jan 2016 22:04:28 -0800 Received: from IRVEXCHSMTP2.corp.ad.broadcom.com (10.9.207.52) by IRVEXCHCAS07.corp.ad.broadcom.com (10.9.208.55) with Microsoft SMTP Server (TLS) id 14.3.235.1; Tue, 26 Jan 2016 21:21:52 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP2.corp.ad.broadcom.com (10.9.207.52) with Microsoft SMTP Server id 14.3.235.1; Tue, 26 Jan 2016 21:21:52 -0800 Received: from anup-HP-Compaq-8100-Elite-CMT-PC.ban.broadcom.com (unknown [10.131.91.107]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 8B34740FE5; Tue, 26 Jan 2016 21:17:56 -0800 (PST) From: Anup Patel To: Catalin Marinas , Joerg Roedel , Will Deacon , Robin Murphy , Sricharan R , Linux IOMMU , Linux ARM Kernel Subject: [RFC PATCH 4/6] iommu/arm-smmu: Add support for IOMMU_DOMAIN_DMA in SMMUv1/SMMUv2 driver Date: Wed, 27 Jan 2016 10:51:17 +0530 Message-ID: <1453872079-27140-5-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453872079-27140-1-git-send-email-anup.patel@broadcom.com> References: <1453872079-27140-1-git-send-email-anup.patel@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160126_212210_825311_7BF7F822 X-CRM114-Status: GOOD ( 14.65 ) X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Device Tree , Scott Branden , Pawel Moll , Ian Campbell , Ray Jui , Linux Kernel , Vikram Prakash , Rob Herring , BCM Kernel Feedback , Kumar Gala , Anup Patel Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To allow use of large memory (> 4Gb) with 32bit devices we need to use some kind of iommu for such 32bit devices. This patch extends SMMUv1/SMMUv2 driver to support DMA domains which in-turn will allows us to use iommu based DMA mappings for 32bit devices. Signed-off-by: Anup Patel Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- drivers/iommu/arm-smmu.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 9bdf6b2..43424fe 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -29,6 +29,7 @@ #define pr_fmt(fmt) "arm-smmu: " fmt #include +#include #include #include #include @@ -967,7 +968,7 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) { struct arm_smmu_domain *smmu_domain; - if (type != IOMMU_DOMAIN_UNMANAGED) + if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) return NULL; /* * Allocate the domain and initialise some of its data structures. @@ -978,6 +979,12 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) if (!smmu_domain) return NULL; + if (type == IOMMU_DOMAIN_DMA && + iommu_get_dma_cookie(&smmu_domain->domain)) { + kfree(smmu_domain); + return NULL; + } + mutex_init(&smmu_domain->init_mutex); spin_lock_init(&smmu_domain->pgtbl_lock); @@ -992,6 +999,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) * Free the domain resources. We assume that all devices have * already been detached. */ + iommu_put_dma_cookie(domain); arm_smmu_destroy_domain_context(domain); kfree(smmu_domain); } @@ -1361,6 +1369,16 @@ static int arm_smmu_init_platform_device(struct device *dev, return 0; } +int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) +{ + /* + * Nothing to do here because SMMU is already aware of all + * MMU masters and their stream IDs using mmu-master attibute + * SMMU DT node. + */ + return 0; +} + static int arm_smmu_add_device(struct device *dev) { struct iommu_group *group; @@ -1458,6 +1476,7 @@ static struct iommu_ops arm_smmu_ops = { .unmap = arm_smmu_unmap, .map_sg = default_iommu_map_sg, .iova_to_phys = arm_smmu_iova_to_phys, + .of_xlate = arm_smmu_of_xlate, .add_device = arm_smmu_add_device, .remove_device = arm_smmu_remove_device, .device_group = arm_smmu_device_group,