From patchwork Thu Jan 28 11:23:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 8149521 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 08F7B9F38B for ; Thu, 28 Jan 2016 11:26:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 437DC20219 for ; Thu, 28 Jan 2016 11:26:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F10020211 for ; Thu, 28 Jan 2016 11:26:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aOkhL-0005FI-RA; Thu, 28 Jan 2016 11:25:11 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aOkgU-0003rY-D5 for linux-arm-kernel@lists.infradead.org; Thu, 28 Jan 2016 11:24:22 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id ABBCE34F; Thu, 28 Jan 2016 12:23:57 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (AToulouse-657-1-1062-176.w90-50.abo.wanadoo.fr [90.50.4.176]) by mail.free-electrons.com (Postfix) with ESMTPSA id 790101BE; Thu, 28 Jan 2016 12:23:57 +0100 (CET) From: Thomas Petazzoni To: Russell King , Nicolas Pitre Subject: [PATCH v2 1/2] ARM: smp_scu: enable coherent speculative linefills Date: Thu, 28 Jan 2016 12:23:48 +0100 Message-Id: <1453980229-5678-2-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1453980229-5678-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1453980229-5678-1-git-send-email-thomas.petazzoni@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160128_032419_018794_E93E5BEA X-CRM114-Status: GOOD ( 12.86 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nadav Haklai , Lior Amsalem , Gregory Clement , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP According to the ARM TRM, about the SCU Control Register, bit 3 (Speculative linefills enable) : When set, coherent linefill requests are sent speculatively to the PL310 in parallel with the tag lookup. If the tag lookup misses, the confirmed linefill is sent to the PL310 and gets Rdata earlier because the data request was already initiated by the speculative request. This feature works only if the PL310 is present in the design. This feature may improve the overall system performance. Since the public ARM web site only documents Cortex-A9 revisions r2p0 and later, we err on the safe side and only enable this bit on >= r2p0 platforms, like the standby bit. Signed-off-by: Thomas Petazzoni --- arch/arm/kernel/smp_scu.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 72f9241..227bb86 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -18,6 +18,7 @@ #define SCU_CTRL 0x00 #define SCU_ENABLE (1 << 0) +#define SCU_SPEC_LINEFILL (1 << 3) #define SCU_STANDBY_ENABLE (1 << 5) #define SCU_CONFIG 0x04 #define SCU_CPU_STATUS 0x08 @@ -57,10 +58,13 @@ void scu_enable(void __iomem *scu_base) scu_ctrl |= SCU_ENABLE; - /* Cortex-A9 earlier than r2p0 has no standby bit in SCU */ + /* + * Cortex-A9 earlier than r2p0 has no standby / speculative + * line fills bits in SCU + */ if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090 && (read_cpuid_id() & 0x00f0000f) >= 0x00200000) - scu_ctrl |= SCU_STANDBY_ENABLE; + scu_ctrl |= SCU_STANDBY_ENABLE | SCU_SPEC_LINEFILL; writel_relaxed(scu_ctrl, scu_base + SCU_CTRL);