From patchwork Sun Jan 31 01:21:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vishnupatekar X-Patchwork-Id: 8172901 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EC95F9F9A0 for ; Sun, 31 Jan 2016 01:27:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1FF07202F0 for ; Sun, 31 Jan 2016 01:27:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 403F220265 for ; Sun, 31 Jan 2016 01:27:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aPglb-0000Gs-RG; Sun, 31 Jan 2016 01:25:27 +0000 Received: from mail-pa0-x243.google.com ([2607:f8b0:400e:c03::243]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aPgil-0004sR-EX for linux-arm-kernel@lists.infradead.org; Sun, 31 Jan 2016 01:22:32 +0000 Received: by mail-pa0-x243.google.com with SMTP id x8so413753pav.3 for ; Sat, 30 Jan 2016 17:22:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xmOK4WAByTVC/Erle1c0eGAidiH994FNMM0GOy06lFY=; b=Vejqwk+xO2mVJd1RDwdB6kkXaCMwjkZc1oXcFugZZSFnclhHz5HtVfg57QZ30Q6YF8 DKQn2gMK6IogD2eH/gaQ86p1WxHYtCuIsXQQ6yw1MUpCM7DMwIzAQwUhoF287Ylomdka fI007CfsDInfGUzQVVCMFMfq31ZB9h5F73fscZUDBr+mW0s+P+INOwfjywTL1HO3UqNv 0/oLj15UFI05/qzzehUd8r4rVIqF5nBjurck/eFVbhuhRFw4zTHTv7inTaKAQDeHIb9p 1xuyz27tYtzu7gRKvL/5J9TTpCScmYs0baB0U4Bzr9o2CDNT/EIOchIH8RoZh6CzU7ib E6lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xmOK4WAByTVC/Erle1c0eGAidiH994FNMM0GOy06lFY=; b=dIbPlhNpKTCav4veum7FbVodPsE2mX09uHlwnOuLw9o8prqh/4VXAEbgmaEVjuvUxG oRJL1FqCOTNYo3UHBCNcGE49SxXpDZUXvO1CtHRNZJodCExf9e/mpulMim7BUWzkoTgt 8xArfJSVDYqXDDVLoGe5vhZTCfq3cwcGknoK128tm3Aoc+HQ5n3CaKlPk1FwOOwsgVt+ qBAu3MIeEgclSVx+fYLsd4HCruqdapWGjN20uJv55gRbd2uVhWNQx48XR1jAvgsu+TD5 Fas8sh5RFIdI03YYsKCLO8MP4UKJTRb8jk2Zv3Vt/pqvQU6N5nsvpJ/tXloCozveg0kT kgFQ== X-Gm-Message-State: AG10YOQp2n6Jq+ytMUDv0Bu7cWaoJ5KfzgFTQXbM8SqznAtJnviqp3dVyYnoRY864lsW8A== X-Received: by 10.66.150.66 with SMTP id ug2mr26781064pab.114.1454203332310; Sat, 30 Jan 2016 17:22:12 -0800 (PST) Received: from localhost.localdomain ([116.88.131.187]) by smtp.gmail.com with ESMTPSA id o4sm32973151pfa.85.2016.01.30.17.22.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 30 Jan 2016 17:22:11 -0800 (PST) From: Vishnu Patekar To: robh+dt@kernel.org, corbet@lwn.net, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, maxime.ripard@free-electrons.com, linux@arm.linux.org.uk, emilio@elopez.com.ar Subject: [PATCH 10/14] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets Date: Sun, 31 Jan 2016 09:21:02 +0800 Message-Id: <1454203266-4450-11-git-send-email-vishnupatekar0510@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454203266-4450-1-git-send-email-vishnupatekar0510@gmail.com> References: <1454203266-4450-1-git-send-email-vishnupatekar0510@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160130_172231_543375_BB6CB90C X-CRM114-Status: UNSURE ( 9.32 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, patchesrdh@mveas.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, hdegoede@redhat.com, wens@csie.org, mturquette@baylibre.com, jenskuske@gmail.com, linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 44 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index ac96aa1..5ea20ff 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -268,6 +268,44 @@ "mmc2_output", "mmc2_sample"; }; + + cpus_clk: clk@01f01400 { + compatible = "allwinner,sun9i-a80-cpus-clk"; + reg = <0x01f01400 0x4>; + #clock-cells = <0>; + clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&osc16M>; + clock-output-names = "cpus"; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&cpus_clk>; + clock-output-names = "ahb0"; + }; + + apb0: clk@01f0140c { + compatible = "allwinner,sun8i-a23-apb0-clk"; + reg = <0x01f0140c 0x4>; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + + apb0_gates: clk@01f01428 { + compatible = "allwinner,sun8i-a83t-apb0-gates-clk"; + reg = <0x01f01428 0x4>; + #clock-cells = <1>; + clocks = <&apb0>; + clock-indices = <0>, <1>, + <2>, <3>, + <4>, <6>, <7>; + clock-output-names = "apb0_pio", "apb0_ir", + "apb0_timer", "apb0_rsb", + "apb0_uart", "apb0_i2c0", "apb0_twd"; + }; }; soc { @@ -434,5 +472,11 @@ #interrupt-cells = <3>; interrupts = ; }; + + apb0_reset: reset@01f014b0 { + reg = <0x01f014b0 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; }; };