From patchwork Tue Feb 2 21:21:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Adamski X-Patchwork-Id: 8195821 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7847A9F4DD for ; Tue, 2 Feb 2016 21:27:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B01FC2025B for ; Tue, 2 Feb 2016 21:27:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D040C20204 for ; Tue, 2 Feb 2016 21:27:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aQiRU-0003rf-6q; Tue, 02 Feb 2016 21:24:56 +0000 Received: from box2.japko.eu ([91.121.152.53]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aQiPt-0002EL-Cz for linux-arm-kernel@lists.infradead.org; Tue, 02 Feb 2016 21:23:32 +0000 Received: by box2.japko.eu (Postfix, from userid 1000) id 961FF62990; Tue, 2 Feb 2016 22:22:55 +0100 (CET) From: Krzysztof Adamski To: Linus Walleij , Maxime Ripard , Chen-Yu Tsai , Rob Herring , Hans de Goede , Vishnu Patekar , Krzysztof Adamski , Jens Kuske , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com Subject: [PATCH v2 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi Date: Tue, 2 Feb 2016 22:21:52 +0100 Message-Id: <1454448113-18810-5-git-send-email-k@japko.eu> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454448113-18810-1-git-send-email-k@japko.eu> References: <1454448113-18810-1-git-send-email-k@japko.eu> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160202_132318_414857_0F0F817A X-CRM114-Status: UNSURE ( 7.54 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the corresponding device node for R_PIO on H3 to the dtsi. Support for the controller was added in earlier commit. Signed-off-by: Krzysztof Adamski --- .../devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt index 9213b27..3e56b16 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt @@ -21,6 +21,7 @@ Required properties: "allwinner,sun9i-a80-r-pinctrl" "allwinner,sun8i-a83t-pinctrl" "allwinner,sun8i-h3-pinctrl" + "allwinner,sun8i-h3-r-pinctrl" - reg: Should contain the register physical address and length for the pin controller. diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index ce35e93..1593e2d 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -525,5 +525,17 @@ compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; }; + + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun8i-h3-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = ; + clocks = <&apb0_gates 0>; + resets = <&apb0_reset 0>; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; };