From patchwork Wed Feb 3 04:12:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 8197831 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 322CEBEEE5 for ; Wed, 3 Feb 2016 04:17:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 454D020251 for ; Wed, 3 Feb 2016 04:17:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 69C4920221 for ; Wed, 3 Feb 2016 04:17:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aQorA-0006Rb-7g; Wed, 03 Feb 2016 04:15:52 +0000 Received: from mail-pa0-f66.google.com ([209.85.220.66]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aQopo-0003pB-Bn; Wed, 03 Feb 2016 04:14:32 +0000 Received: by mail-pa0-f66.google.com with SMTP id gi1so386510pac.2; Tue, 02 Feb 2016 20:14:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=axbF8s7l2riAKJDTLANAqoPbfkt+PkDPDZwLWJBhy84=; b=DutexMkhXGFffECHShvjiKGoGeHQF6snSGdmoJlSi5o2+0+iBrTF2Oc/DnGFNngPc8 xKpgKC8QUahkb6bXg8+joxdiJefWJF+Q1xddqkQn9TkefGk+KmaZmuQpxMwwYkhDCwJI VvEDFKkT5cGiaYPAIMKCPq53D1XHNa6wvaQ0iJO/nY/1GgS1ysR2DnUHZxq3hhdDRFxf OVGpazXDMmxFNlyC6re+WeIyQpdazaZoa9U2AkljUsL/vZaBAT+9/OoIh550AkZfrrFH OkqfIhfFKLeX4rlyECz/WJ0RV8VXpHQ1op3lGkXk8eV9mHT2YpNY+IGzspWJzQZrPV68 4AZQ== X-Gm-Message-State: AG10YORjWZqb2FA7qIOHc4PeLCdEfAWLtBFLYTLpF6tI40jNxST8NzW59GZhOohNXUaORg== X-Received: by 10.67.2.10 with SMTP id bk10mr51352306pad.26.1454472847588; Tue, 02 Feb 2016 20:14:07 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id cf6sm5809274pad.41.2016.02.02.20.14.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 02 Feb 2016 20:14:06 -0800 (PST) From: Caesar Wang To: Heiko Stuebner , edubezval@gmail.com Subject: [PATCH 8/8] ARM: dts: rockchip: add the thermal main info found on rk3228 Date: Wed, 3 Feb 2016 12:12:47 +0800 Message-Id: <1454472767-5767-9-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454472767-5767-1-git-send-email-wxt@rock-chips.com> References: <1454472767-5767-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160202_201428_732163_FEB42938 X-CRM114-Status: GOOD ( 13.48 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, devicetree@vger.kernel.org, Dmitry Torokhov , Russell King , Pawel Moll , Ian Campbell , zhangqing@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Mark Rutland , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the thermal needed main information for rk3228 SoCS. Basically has the following content: 1) TSADC controller: Add the needed attributes for rk3036 TSADC controller. Especially for the TSHUT, in some cases if we are unable to shut it down in orderly fashion (says: kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature is over 95C over a period of time the thermal shutdown of the tsadc is invoked with can either reset the entire chip via the CRU, or notify the PMIC via a GPIO. This should be set in the specific board. 2) Thermal zones: Add the needed device mode for thermal generic framework. Detail in Documentation/devicetree/bindings/thermal/thermal.txt. Signed-off-by: Caesar Wang --- arch/arm/boot/dts/rk3228.dtsi | 69 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi index 119ff12..afce7fd 100644 --- a/arch/arm/boot/dts/rk3228.dtsi +++ b/arch/arm/boot/dts/rk3228.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -69,6 +70,7 @@ /* KHz uV */ 816000 1000000 >; + #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; }; @@ -247,6 +249,63 @@ assigned-clock-rates = <594000000>; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&tsadc 0>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_alert1: cpu_alert1 { + temperature = <75000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT 6>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + tsadc: tsadc@11150000 { + compatible = "rockchip,rk3228-tsadc"; + reg = <0x11150000 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; + #thermal-sensor-cells = <0>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; + emmc: dwmmc@30020000 { compatible = "rockchip,rk3288-dw-mshc"; reg = <0x30020000 0x4000>; @@ -394,6 +453,16 @@ }; }; + tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otp_out: otp-out { + rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,