From patchwork Wed Feb 3 18:39:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 8208441 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5D405BEEE5 for ; Wed, 3 Feb 2016 19:29:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 721D620172 for ; Wed, 3 Feb 2016 19:29:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E90520122 for ; Wed, 3 Feb 2016 19:29:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aR35S-0000uv-5V; Wed, 03 Feb 2016 19:27:34 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aR35I-0000mo-Cr for linux-arm-kernel@bombadil.infradead.org; Wed, 03 Feb 2016 19:27:24 +0000 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]) by merlin.infradead.org with esmtps (Exim 4.85 #2 (Red Hat Linux)) id 1aR2Lq-0005FN-4w for linux-arm-kernel@lists.infradead.org; Wed, 03 Feb 2016 18:40:26 +0000 Received: by mail-pa0-x229.google.com with SMTP id uo6so17922929pac.1 for ; Wed, 03 Feb 2016 10:40:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5S9/UCjMOEfel55cx/sgMhLw9npADYrXvJZAaPxrE/I=; b=WZiQ4GOChGZOl8H8CE13Nx6kPrFF17PP+vrnchLdDepwvcL1e44vhB0Np4b9C2iMKI HVE3lI09kqKNTBDgN9+3uKsjUL8h7HqcDJvv/DiHtIBe49UolD92ssxi5zetO6BG01CV dmdKAcQXUts54oQlOfCkcdAkxXiQTtbIhNwLA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5S9/UCjMOEfel55cx/sgMhLw9npADYrXvJZAaPxrE/I=; b=KljoBH3ZQ7b2Flu0cJP4idrm5hJq+j8jKRFM+odeDmPWVxaIx4zBDDbiw0ROE+060m BIFjMplpZd/OoeWf7iXoYyzdF13Hqh5R4wZKLpe5XT6AQGfL5fp0j58nGwR4ZDfJtFFb IMKUq0x/eUUwEsO+S6/IBsG4WLTzcYKQ+BO8g0HEj5hyLQmVzqmNNLsZ7/m3VEoUAtTN 2DyRAEiCp8f1hYoknjZ8aAoWpwD63kOIoYU4A0t+QYkHrd15rV+fki6YV010xiW9AmPl 2KPjtek6kkT3S1Kk8S34KswPxHnWA3Y4OFP+47M3cNkzf6/3MwN6RjOlN54AlJMYtjJH ITWg== X-Gm-Message-State: AG10YOTj2LJ1+d1GV5gwHeyFCO83umbVVLHufBMTRHSRRI4vROR/SoWZHSzg181ALMl/iDex X-Received: by 10.66.147.165 with SMTP id tl5mr4554553pab.88.1454524805159; Wed, 03 Feb 2016 10:40:05 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xa9sm11369704pab.44.2016.02.03.10.40.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Feb 2016 10:40:04 -0800 (PST) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V9 18/18] coresight: introducing a global trace ID function Date: Wed, 3 Feb 2016 11:39:16 -0700 Message-Id: <1454524756-10628-19-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> References: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160203_134026_344672_73F6DF12 X-CRM114-Status: GOOD ( 13.95 ) X-Spam-Score: -2.0 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexander.shishkin@linux.intel.com, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP TraceID values have to be unique for all tracers and consistent between drivers and user space. As such introducing a central function to be used whenever a traceID value is required. The patch also account for data traceIDs, which are usually I(N) + 1. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 7 ++----- include/linux/coresight-pmu.h | 12 ++++++++++++ 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 77b37413803f..0ba1a3981373 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -740,11 +741,7 @@ static void etm_init_arch_data(void *info) static void etm_init_trace_id(struct etm_drvdata *drvdata) { - /* - * A trace ID of value 0 is invalid, so let's start at some - * random value that fits in 7 bits and go from there. - */ - drvdata->traceid = 0x10 + drvdata->cpu; + drvdata->traceid = coresight_get_trace_id(drvdata->cpu); } static int etm_probe(struct amba_device *adev, const struct amba_id *id) diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 6c5386b23b10..7d410260661b 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -19,9 +19,21 @@ #define _LINUX_CORESIGHT_PMU_H #define CORESIGHT_ETM_PMU_NAME "cs_etm" +#define CORESIGHT_ETM_PMU_SEED 0x10 /* ETMv3.5/PTM's ETMCR config bit */ #define ETM_OPT_CYCACC 12 #define ETM_OPT_TS 28 +static inline int coresight_get_trace_id(int cpu) +{ + /* + * A trace ID of value 0 is invalid, so let's start at some + * random value that fits in 7 bits and go from there. Since + * the common convention is to have data trace IDs be I(N) + 1, + * set instruction trace IDs as a function of the CPU number. + */ + return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); +} + #endif