diff mbox

[linux-sunxi] ARM: dts: sun7i: Enable USB DRC on Olimex A20 EVB

Message ID 1454945387-29424-1-git-send-email-codekipper@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Code Kipper Feb. 8, 2016, 3:29 p.m. UTC 
From: Marcus Cooper <codekipper@gmail.com>

Enable the otg/drc usb controller on the Olimex A20 EVB.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
---
 arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

Hans de Goede Feb. 8, 2016, 3:43 p.m. UTC | #1 
Hi,

On 08-02-16 16:29, codekipper@gmail.com wrote:
> From: Marcus Cooper <codekipper@gmail.com>
>
> Enable the otg/drc usb controller on the Olimex A20 EVB.

Does the A20 EVB not have some form of Vbus detect for the OTG
port hooked up ? That does not sound right. Please double check.

Regards,

Hans


>
> Signed-off-by: Marcus Cooper <codekipper@gmail.com>
> ---
>   arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
> index c3c626b..93bbf26 100644
> --- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
> @@ -198,6 +198,10 @@
>   	status = "okay";
>   };
>
> +&otg_sram {
> +	status = "okay";
> +};
> +
>   &pio {
>   	ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {
>   		allwinner,pins = "PC3";
> @@ -219,6 +223,13 @@
>   		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
>   		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
>   	};
> +
> +	usb0_id_detect_pin: usb0_id_detect_pin@0 {
> +		allwinner,pins = "PH4";
> +		allwinner,function = "gpio_in";
> +		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> +		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> +	};
>   };
>
>   &reg_ahci_5v {
> @@ -254,6 +265,10 @@
>   	regulator-name = "avcc";
>   };
>
> +&reg_usb0_vbus {
> +	status = "okay";
> +};
> +
>   &reg_usb1_vbus {
>   	status = "okay";
>   };
> @@ -268,7 +283,16 @@
>   	status = "okay";
>   };
>
> +&usb_otg {
> +	dr_mode = "otg";
> +	status = "okay";
> +};
> +
>   &usbphy {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&usb0_id_detect_pin>;
> +	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH04 */
> +	usb0_vbus-supply = <&reg_usb0_vbus>;
>   	usb1_vbus-supply = <&reg_usb1_vbus>;
>   	usb2_vbus-supply = <&reg_usb2_vbus>;
>   	status = "okay";
>
Code Kipper Feb. 8, 2016, 4:10 p.m. UTC | #2 
On 8 February 2016 at 16:43, Hans de Goede <hdegoede@redhat.com> wrote:
> Hi,
>
> On 08-02-16 16:29, codekipper@gmail.com wrote:
>>
>> From: Marcus Cooper <codekipper@gmail.com>
>>
>> Enable the otg/drc usb controller on the Olimex A20 EVB.
>
>
> Does the A20 EVB not have some form of Vbus detect for the OTG
> port hooked up ? That does not sound right. Please double check.
Yeah...looks like it does...PH5. I'll add that and test.
CK
>
> Regards,
>
> Hans
>
>
>
>>
>> Signed-off-by: Marcus Cooper <codekipper@gmail.com>
>> ---
>>   arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 24
>> ++++++++++++++++++++++++
>>   1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
>> b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
>> index c3c626b..93bbf26 100644
>> --- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
>> +++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
>> @@ -198,6 +198,10 @@
>>         status = "okay";
>>   };
>>
>> +&otg_sram {
>> +       status = "okay";
>> +};
>> +
>>   &pio {
>>         ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {
>>                 allwinner,pins = "PC3";
>> @@ -219,6 +223,13 @@
>>                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
>>                 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
>>         };
>> +
>> +       usb0_id_detect_pin: usb0_id_detect_pin@0 {
>> +               allwinner,pins = "PH4";
>> +               allwinner,function = "gpio_in";
>> +               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
>> +               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
>> +       };
>>   };
>>
>>   &reg_ahci_5v {
>> @@ -254,6 +265,10 @@
>>         regulator-name = "avcc";
>>   };
>>
>> +&reg_usb0_vbus {
>> +       status = "okay";
>> +};
>> +
>>   &reg_usb1_vbus {
>>         status = "okay";
>>   };
>> @@ -268,7 +283,16 @@
>>         status = "okay";
>>   };
>>
>> +&usb_otg {
>> +       dr_mode = "otg";
>> +       status = "okay";
>> +};
>> +
>>   &usbphy {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&usb0_id_detect_pin>;
>> +       usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH04 */
>> +       usb0_vbus-supply = <&reg_usb0_vbus>;
>>         usb1_vbus-supply = <&reg_usb1_vbus>;
>>         usb2_vbus-supply = <&reg_usb2_vbus>;
>>         status = "okay";
>>
>
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index c3c626b..93bbf26 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -198,6 +198,10 @@ 
 	status = "okay";
 };
 
+&otg_sram {
+	status = "okay";
+};
+
 &pio {
 	ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {
 		allwinner,pins = "PC3";
@@ -219,6 +223,13 @@ 
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 	};
+
+	usb0_id_detect_pin: usb0_id_detect_pin@0 {
+		allwinner,pins = "PH4";
+		allwinner,function = "gpio_in";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
 };
 
 &reg_ahci_5v {
@@ -254,6 +265,10 @@ 
 	regulator-name = "avcc";
 };
 
+&reg_usb0_vbus {
+	status = "okay";
+};
+
 &reg_usb1_vbus {
 	status = "okay";
 };
@@ -268,7 +283,16 @@ 
 	status = "okay";
 };
 
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
 &usbphy {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb0_id_detect_pin>;
+	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH04 */
+	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 	usb2_vbus-supply = <&reg_usb2_vbus>;
 	status = "okay";