From patchwork Wed Feb 10 06:10:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 8268751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5CDF29F38B for ; Wed, 10 Feb 2016 06:14:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BD6820254 for ; Wed, 10 Feb 2016 06:14:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD9EF20166 for ; Wed, 10 Feb 2016 06:14:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aTO0N-0007Ak-Kv; Wed, 10 Feb 2016 06:11:59 +0000 Received: from 5520-maca-inet1-outside.broadcom.com ([216.31.211.11] helo=mail-irv-18.broadcom.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aTO02-0006zL-1G for linux-arm-kernel@lists.infradead.org; Wed, 10 Feb 2016 06:11:39 +0000 Received: from mail-irva-13.broadcom.com (mail-irva-13.broadcom.com [10.11.16.103]) by mail-irv-18.broadcom.com (Postfix) with ESMTP id AF8A682047; Tue, 9 Feb 2016 22:11:19 -0800 (PST) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.ban.broadcom.com (unknown [10.131.91.107]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 3357340FE6; Tue, 9 Feb 2016 22:11:09 -0800 (PST) From: Anup Patel To: Catalin Marinas , Will Deacon , Device Tree , Linux ARM Kernel Subject: [PATCH 3/6] arm64: dts: Add ARM SP804 timer DT nodes for NS2 Date: Wed, 10 Feb 2016 11:40:48 +0530 Message-Id: <1455084651-29325-4-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455084651-29325-1-git-send-email-anup.patel@broadcom.com> References: <1455084651-29325-1-git-send-email-anup.patel@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160209_221138_282707_64B5C822 X-CRM114-Status: UNSURE ( 7.62 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.2 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Yendapally Reddy Dhananjaya Reddy , Florian Fainelli , Scott Branden , Pawel Moll , Ian Campbell , Ray Jui , Linux Kernel , Vikram Prakash , Rob Herring , BCM Kernel Feedback , Kumar Gala , Anup Patel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We have four ARM SP804 dual-mode timer instances in NS2 SoC hence this patch adds appropriate DT nodes for NS2. Signed-off-by: Anup Patel Reviewed-by: Ray Jui Reviewed-by: Pramod KUMAR Reviewed-by: Scott Branden --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 40 +++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index b1f352d..83e1c27 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -256,6 +256,46 @@ <0x65260000 0x1000>; }; + timer0: timer@66030000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x66030000 0x1000>; + interrupts = ; + clocks = <&iprocslow>, + <&iprocslow>, + <&iprocslow>; + clock-names = "timer1", "timer2", "apb_pclk"; + }; + + timer1: timer@66040000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x66040000 0x1000>; + interrupts = ; + clocks = <&iprocslow>, + <&iprocslow>, + <&iprocslow>; + clock-names = "timer1", "timer2", "apb_pclk"; + }; + + timer2: timer@66050000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x66050000 0x1000>; + interrupts = ; + clocks = <&iprocslow>, + <&iprocslow>, + <&iprocslow>; + clock-names = "timer1", "timer2", "apb_pclk"; + }; + + timer3: timer@66060000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x66060000 0x1000>; + interrupts = ; + clocks = <&iprocslow>, + <&iprocslow>, + <&iprocslow>; + clock-names = "timer1", "timer2", "apb_pclk"; + }; + i2c0: i2c@66080000 { compatible = "brcm,iproc-i2c"; reg = <0x66080000 0x100>;