From patchwork Wed Feb 10 06:10:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 8268781 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0BF0A9F38B for ; Wed, 10 Feb 2016 06:15:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2085D20254 for ; Wed, 10 Feb 2016 06:15:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 295B220218 for ; Wed, 10 Feb 2016 06:15:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aTO1R-00084F-53; Wed, 10 Feb 2016 06:13:05 +0000 Received: from 5520-maca-inet1-outside.broadcom.com ([216.31.211.11] helo=mail-irv-18.broadcom.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aTO0M-00073f-1J for linux-arm-kernel@lists.infradead.org; Wed, 10 Feb 2016 06:12:00 +0000 Received: from mail-irva-13.broadcom.com (mail-irva-13.broadcom.com [10.11.16.103]) by mail-irv-18.broadcom.com (Postfix) with ESMTP id CA7C282032; Tue, 9 Feb 2016 22:11:38 -0800 (PST) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.ban.broadcom.com (unknown [10.131.91.107]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 5CE6040FE6; Tue, 9 Feb 2016 22:11:29 -0800 (PST) From: Anup Patel To: Catalin Marinas , Will Deacon , Device Tree , Linux ARM Kernel Subject: [PATCH 6/6] arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2 Date: Wed, 10 Feb 2016 11:40:51 +0530 Message-Id: <1455084651-29325-7-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455084651-29325-1-git-send-email-anup.patel@broadcom.com> References: <1455084651-29325-1-git-send-email-anup.patel@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160209_221158_513578_03C326C3 X-CRM114-Status: UNSURE ( 8.71 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.2 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Yendapally Reddy Dhananjaya Reddy , Florian Fainelli , Scott Branden , Pawel Moll , Ian Campbell , Ray Jui , Linux Kernel , Vikram Prakash , Rob Herring , BCM Kernel Feedback , Kumar Gala , Anup Patel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ray Jui This patch enables PCIe0 and PCIe4 for NS2 by adding appropriate DT nodes in NS2 DT. Signed-off-by: Ray Jui Signed-off-by: Anup Patel Reviewed-by: Scott Branden --- arch/arm64/boot/dts/broadcom/ns2-svk.dts | 8 ++++ arch/arm64/boot/dts/broadcom/ns2.dtsi | 74 ++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts index 3321bd1..ce0ab84 100644 --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts @@ -52,6 +52,14 @@ }; }; +&pcie0 { + status = "ok"; +}; + +&pcie4 { + status = "ok"; +}; + &i2c0 { status = "ok"; }; diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 062616b4..6f81c9d 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -137,6 +137,80 @@ }; }; + pcie0: pcie@20020000 { + compatible = "brcm,iproc-pcie"; + reg = <0 0x20020000 0 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 281 IRQ_TYPE_NONE>; + + linux,pci-domain = <0>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x83000000 0 0x00000000 0 0x00000000 0 0x20000000>; + + brcm,pcie-ob; + brcm,pcie-ob-oarr-size; + brcm,pcie-ob-axi-offset = <0x00000000>; + brcm,pcie-ob-window-size = <256>; + + status = "disabled"; + + msi-parent = <&msi0>; + msi0: msi@20020000 { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + brcm,num-eq-region = <1>; + brcm,num-msi-msg-region = <1>; + }; + }; + + pcie4: pcie@50020000 { + compatible = "brcm,iproc-pcie"; + reg = <0 0x50020000 0 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 305 IRQ_TYPE_NONE>; + + linux,pci-domain = <4>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x83000000 0 0x00000000 0 0x30000000 0 0x20000000>; + + brcm,pcie-ob; + brcm,pcie-ob-oarr-size; + brcm,pcie-ob-axi-offset = <0x30000000>; + brcm,pcie-ob-window-size = <256>; + + status = "disabled"; + + msi-parent = <&msi4>; + msi4: msi@50020000 { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; + }; + soc: soc { compatible = "simple-bus"; #address-cells = <1>;