diff mbox

[v3,39/52] mtd: nand: jz4780: switch to mtd_ooblayout_ops

Message ID 1456448280-27788-40-git-send-email-boris.brezillon@free-electrons.com (mailing list archive)
State New, archived
Headers show

Commit Message

Boris BREZILLON Feb. 26, 2016, 12:57 a.m. UTC
Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 drivers/mtd/nand/jz4780_nand.c | 19 +++++--------------
 1 file changed, 5 insertions(+), 14 deletions(-)

Comments

Harvey Hunt Feb. 29, 2016, 10:45 a.m. UTC | #1
Hi Boris,

On 26/02/16 00:57, Boris Brezillon wrote:
> Implementing the mtd_ooblayout_ops interface is the new way of exposing
> ECC/OOB layout to MTD users.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>   drivers/mtd/nand/jz4780_nand.c | 19 +++++--------------
>   1 file changed, 5 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/mtd/nand/jz4780_nand.c b/drivers/mtd/nand/jz4780_nand.c
> index e1c016c..b86a579 100644
> --- a/drivers/mtd/nand/jz4780_nand.c
> +++ b/drivers/mtd/nand/jz4780_nand.c
> @@ -56,8 +56,6 @@ struct jz4780_nand_chip {
>   	struct nand_chip chip;
>   	struct list_head chip_list;
>
> -	struct nand_ecclayout ecclayout;
> -
>   	struct gpio_desc *busy_gpio;
>   	struct gpio_desc *wp_gpio;
>   	unsigned int reading: 1;
> @@ -165,8 +163,7 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>   	struct nand_chip *chip = &nand->chip;
>   	struct mtd_info *mtd = nand_to_mtd(chip);
>   	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
> -	struct nand_ecclayout *layout = &nand->ecclayout;
> -	u32 start, i;
> +	int eccbytes;
>
>   	chip->ecc.bytes = fls((1 + 8) * chip->ecc.size)	*
>   				(chip->ecc.strength / 8);
> @@ -201,23 +198,17 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
>   		return 0;
>
>   	/* Generate ECC layout. ECC codes are right aligned in the OOB area. */
> -	layout->eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
> +	eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
>
> -	if (layout->eccbytes > mtd->oobsize - 2) {
> +	if (eccbytes > mtd->oobsize - 2) {
>   		dev_err(dev,
>   			"invalid ECC config: required %d ECC bytes, but only %d are available",
> -			layout->eccbytes, mtd->oobsize - 2);
> +			eccbytes, mtd->oobsize - 2);
>   		return -EINVAL;
>   	}
>
> -	start = mtd->oobsize - layout->eccbytes;
> -	for (i = 0; i < layout->eccbytes; i++)
> -		layout->eccpos[i] = start + i;
> -
> -	layout->oobfree[0].offset = 2;
> -	layout->oobfree[0].length = mtd->oobsize - layout->eccbytes - 2;
> +	mtd->ooblayout = &nand_ooblayout_lp_ops;
>
> -	chip->ecc.layout = layout;
>   	return 0;
>   }
>
>

With your patch applied [0] that you gave me earlier in the patchset, I 
am able to boot to userland on my Ci20 (jz4780_{nand,bch}) with a NAND 
rootfs. So, dependant upon that patch (or equivalent) being added to 
this patchset:

Tested-by: Harvey Hunt <harvey.hunt@imgtec.com>

Thanks,

Harvey

[0] http://code.bulix.org/36oytz-91960
diff mbox

Patch

diff --git a/drivers/mtd/nand/jz4780_nand.c b/drivers/mtd/nand/jz4780_nand.c
index e1c016c..b86a579 100644
--- a/drivers/mtd/nand/jz4780_nand.c
+++ b/drivers/mtd/nand/jz4780_nand.c
@@ -56,8 +56,6 @@  struct jz4780_nand_chip {
 	struct nand_chip chip;
 	struct list_head chip_list;
 
-	struct nand_ecclayout ecclayout;
-
 	struct gpio_desc *busy_gpio;
 	struct gpio_desc *wp_gpio;
 	unsigned int reading: 1;
@@ -165,8 +163,7 @@  static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
 	struct nand_chip *chip = &nand->chip;
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
-	struct nand_ecclayout *layout = &nand->ecclayout;
-	u32 start, i;
+	int eccbytes;
 
 	chip->ecc.bytes = fls((1 + 8) * chip->ecc.size)	*
 				(chip->ecc.strength / 8);
@@ -201,23 +198,17 @@  static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
 		return 0;
 
 	/* Generate ECC layout. ECC codes are right aligned in the OOB area. */
-	layout->eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
+	eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
 
-	if (layout->eccbytes > mtd->oobsize - 2) {
+	if (eccbytes > mtd->oobsize - 2) {
 		dev_err(dev,
 			"invalid ECC config: required %d ECC bytes, but only %d are available",
-			layout->eccbytes, mtd->oobsize - 2);
+			eccbytes, mtd->oobsize - 2);
 		return -EINVAL;
 	}
 
-	start = mtd->oobsize - layout->eccbytes;
-	for (i = 0; i < layout->eccbytes; i++)
-		layout->eccpos[i] = start + i;
-
-	layout->oobfree[0].offset = 2;
-	layout->oobfree[0].length = mtd->oobsize - layout->eccbytes - 2;
+	mtd->ooblayout = &nand_ooblayout_lp_ops;
 
-	chip->ecc.layout = layout;
 	return 0;
 }