From patchwork Sun Feb 28 15:37:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Sperl X-Patchwork-Id: 8447471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5D785C0553 for ; Sun, 28 Feb 2016 15:49:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 78C072011B for ; Sun, 28 Feb 2016 15:49:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 991B72010F for ; Sun, 28 Feb 2016 15:49:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aa3a0-0007wm-6J; Sun, 28 Feb 2016 15:48:20 +0000 Received: from 212-186-180-163.dynamic.surfer.at ([212.186.180.163] helo=cgate.sperl.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aa3Qh-0005Pu-1t; Sun, 28 Feb 2016 15:38:44 +0000 Received: from raspcm.intern.sperl.org (account martin@sperl.org [10.10.10.41] verified) by sperl.org (CommuniGate Pro SMTP 6.1.2) with ESMTPSA id 6394916; Sun, 28 Feb 2016 15:37:23 +0000 From: kernel@martin.sperl.org To: Michael Turquette , Stephen Boyd , Stephen Warren , Lee Jones , Eric Anholt , linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 18/20] clk: bcm2835: add arm clock Date: Sun, 28 Feb 2016 15:37:09 +0000 Message-Id: <1456673831-2408-19-git-send-email-kernel@martin.sperl.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1456673831-2408-1-git-send-email-kernel@martin.sperl.org> References: <1456673831-2408-1-git-send-email-kernel@martin.sperl.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160228_073843_483326_AD61313A X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.9 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Sperl MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Martin Sperl Add the missing "ARM" clock to the clock framework. This clock is essentially a gate clock but with a 16 channel mux. We assume this is a mux that uses PLLB_ARM, so a dedicated mux for arm was created. Signed-off-by: Martin Sperl --- drivers/clk/bcm/clk-bcm2835.c | 34 +++++++++++++++++++++++++++++++++- include/dt-bindings/clock/bcm2835.h | 1 + 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index a5c108a..4f002b7 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -118,6 +118,7 @@ #define CM_SDCCTL 0x1a8 #define CM_SDCDIV 0x1ac #define CM_ARMCTL 0x1b0 +#define CM_ARMDIV 0x1b4 #define CM_AVEOCTL 0x1b8 #define CM_AVEODIV 0x1bc #define CM_EMMCCTL 0x1c0 @@ -1515,11 +1516,33 @@ static const char * const bcm2835_clock_dsi1_parents[] = { .parents = bcm2835_clock_dsi1_parents, \ __VA_ARGS__) +/* arm parent mux */ +static const char * const bcm2835_clock_arm_parents[] = { + "gnd", + "xosc", + "testdebug0", + "testdebug1", + /* + * see comments for dsi0 for possible candidates + * should contain "pllb_arm" at one position + * plla_core/per + * pllb_arm or pllb_core/per + * pllc_core/per + * plld_core/per + * pllh_aux/pix + * up to 16 different parents + */ +}; + +#define REGISTER_ARM_CLK(...) REGISTER_CLK( \ + .num_mux_parents = ARRAY_SIZE(bcm2835_clock_arm_parents), \ + .parents = bcm2835_clock_arm_parents, \ + __VA_ARGS__) + /* * the real definition of all the pll, pll_dividers and clocks * these make use of the above REGISTER_* macros */ - static const struct bcm2835_clk_desc clk_desc_array[] = { /* the PLL + PLL dividers */ @@ -2011,6 +2034,15 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { .int_bits = 1, .frac_bits = 0), + /* arm clocks */ + [BCM2835_CLOCK_DSI1_IMAGE] = REGISTER_ARM_CLK( + /* this is in principle a gate with a 4 bit mux */ + .name = "arm", + .ctl_reg = CM_ARMCTL, + .div_reg = CM_ARMDIV, + .int_bits = 1, + .frac_bits = 0), + /* the gates */ /* diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h index 9254c78..109086e 100644 --- a/include/dt-bindings/clock/bcm2835.h +++ b/include/dt-bindings/clock/bcm2835.h @@ -70,3 +70,4 @@ #define BCM2835_CLOCK_DSI0_IMAGE 52 #define BCM2835_CLOCK_DSI1E 53 #define BCM2835_CLOCK_DSI1_IMAGE 54 +#define BCM2835_CLOCK_ARM 55