From patchwork Thu Mar 3 11:39:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 8491551 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 30DF79F38C for ; Thu, 3 Mar 2016 11:44:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0DC0520295 for ; Thu, 3 Mar 2016 11:44:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A07CE2026C for ; Thu, 3 Mar 2016 11:44:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1abRd8-00078d-I2; Thu, 03 Mar 2016 11:41:18 +0000 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1abRch-0006yc-RI for linux-arm-kernel@lists.infradead.org; Thu, 03 Mar 2016 11:40:53 +0000 Received: by mail-wm0-x229.google.com with SMTP id p65so30671602wmp.1 for ; Thu, 03 Mar 2016 03:40:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XDh5QXWA+j3X7yH+Q0TvPDNOaijA6+RUtT8Jl5zTwr0=; b=p5+8ndwKZkeA3ktv6DBq5bHYFkgzPoh/cf6fOZ35JT3FZLUH7KfLRJ59FLyqcLPm+H 2/KqCf06VcNiEx6lLE0evZzbnxqIsX1QnAfsA/idMnatDEe1y8XksqBp8rOkhRbwjKQa +PilhE2ongbU6s3WAySEhUIkwQlwBRaC+8f5z9/dzoyXDZNiPivgIykbXSFNCfSXnbqk zt+GaaWLjSckBvwWNGcGNfKsfMdxZWBqRrtEqToic6xJlZezICzHb3ks3n6haUJV+ItX b13Mh2pY6dU1TxD3dsVrpe4wwvbI8MVrJsPKFAGvtDhDjYMuOrczwCiCBNzWtYIcsAsC 8dcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XDh5QXWA+j3X7yH+Q0TvPDNOaijA6+RUtT8Jl5zTwr0=; b=YkRtjNmBbFU/ZB4NKESuoAlvdUBwc/3Casrsz266ud+LRtD5LW9ACDkFIspVN5HQW1 spXY5z8HYnxpYUEEIi60yVJntv7KRsaEkuM58RgOcrP4uVlTDblLs7S8TDEbf+qsArap xcs9d4ayGT5gdJ7CwFySBjatSfClcpKOSxdXMY2opeTbap56FNy7sTjyAMCXs7dkw7vs A+SH+ijYsH9x0xu5bxJT0lH8Qx2v+Sib20lTupV1HRYtbDpPFngVpJXpSMDAiK61E6+Z 9Rlt4SombYcVZZTZVziQcfY52ftyVCy2Wfx1B6cq0MAryCWLQJXdjOXg+WfLdH/tvrJv PZ3g== X-Gm-Message-State: AD7BkJLP1GP93meU189oAYGXhQcNVd5BQcB36OP67rir2mqEdsbdvVaN+p8X68B7iId6Evhe X-Received: by 10.28.9.71 with SMTP id 68mr2923319wmj.33.1457005235208; Thu, 03 Mar 2016 03:40:35 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id j18sm8559725wmd.2.2016.03.03.03.40.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Mar 2016 03:40:34 -0800 (PST) From: Neil Armstrong To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, p.zabel@pengutronix.de Subject: [PATCH 06/17] reset: Add PLX Technology Reset Controller driver Date: Thu, 3 Mar 2016 12:39:59 +0100 Message-Id: <1457005210-18485-7-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457005210-18485-1-git-send-email-narmstrong@baylibre.com> References: <1457005210-18485-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160303_034052_073572_9D24EC5E X-CRM114-Status: GOOD ( 19.65 ) X-Spam-Score: -1.2 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ma Haijun , Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add System reset controller driver for PLX Technology OXNAS SoC Family. CC: Ma Haijun Signed-off-by: Neil Armstrong --- drivers/reset/Kconfig | 4 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-oxnas.c | 149 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 154 insertions(+) create mode 100644 drivers/reset/reset-oxnas.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index df37212..f0ea63b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -12,5 +12,9 @@ menuconfig RESET_CONTROLLER If unsure, say no. +config RESET_OXNAS + bool + select MFD_SYSCON + source "drivers/reset/sti/Kconfig" source "drivers/reset/hisilicon/Kconfig" diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 4d7178e..97e04c5 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_ARCH_STI) += sti/ obj-$(CONFIG_ARCH_HISI) += hisilicon/ obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o obj-$(CONFIG_ATH79) += reset-ath79.o +obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o diff --git a/drivers/reset/reset-oxnas.c b/drivers/reset/reset-oxnas.c new file mode 100644 index 0000000..d0ab670 --- /dev/null +++ b/drivers/reset/reset-oxnas.c @@ -0,0 +1,149 @@ +/* + * drivers/reset/reset-oxnas.c + * + * Copyright (C) 2016 Neil Armstrong + * Copyright (C) 2014 Ma Haijun + * Copyright (C) 2009 Oxford Semiconductor Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Regmap offsets */ +#define RST_SET_REGOFFSET 0x34 +#define RST_CLR_REGOFFSET 0x38 + +struct oxnas_reset { + struct regmap *regmap; + struct reset_controller_dev rcdev; +}; + +static int oxnas_reset_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct oxnas_reset *data = + container_of(rcdev, struct oxnas_reset, rcdev); + + regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id)); + msleep(50); + regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id)); + + return 0; +} + +static int oxnas_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct oxnas_reset *data = + container_of(rcdev, struct oxnas_reset, rcdev); + + regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id)); + + return 0; +} + +static int oxnas_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct oxnas_reset *data = + container_of(rcdev, struct oxnas_reset, rcdev); + + regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id)); + + return 0; +} + +static struct reset_control_ops oxnas_reset_ops = { + .reset = oxnas_reset_reset, + .assert = oxnas_reset_assert, + .deassert = oxnas_reset_deassert, +}; + +static const struct of_device_id oxnas_reset_dt_ids[] = { + { .compatible = "plxtech,nas782x-reset", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, oxnas_reset_dt_ids); + +static int oxnas_reset_probe(struct platform_device *pdev) +{ + struct oxnas_reset *data; + struct device *parent; + + parent = pdev->dev.parent; + if (!parent) { + dev_err(&pdev->dev, "no parent\n"); + return -ENODEV; + } + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = syscon_node_to_regmap(parent->of_node); + if (IS_ERR(data->regmap)) { + dev_err(&pdev->dev, "failed to get parent regmap\n"); + return -ENODEV; + } + + data->rcdev.owner = THIS_MODULE; + data->rcdev.nr_resets = 32; + data->rcdev.ops = &oxnas_reset_ops; + data->rcdev.of_node = pdev->dev.of_node; + reset_controller_register(&data->rcdev); + + platform_set_drvdata(pdev, data); + + return 0; +} + +static int oxnas_reset_remove(struct platform_device *pdev) +{ + struct oxnas_reset *data = platform_get_drvdata(pdev); + + reset_controller_unregister(&data->rcdev); + + return 0; +} + +static struct platform_driver oxnas_reset_driver = { + .probe = oxnas_reset_probe, + .remove = oxnas_reset_remove, + .driver = { + .name = "oxnas-reset", + .owner = THIS_MODULE, + .of_match_table = oxnas_reset_dt_ids, + }, +}; + +static int __init oxnas_reset_init(void) +{ + return platform_driver_probe(&oxnas_reset_driver, + oxnas_reset_probe); +} + +/* + * Reset controller does not support probe deferral, so it has to be + * initialized before any user, in particular, PCIE uses subsys_initcall. + */ +arch_initcall(oxnas_reset_init);