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[2/2] ARM: bcm2835: Add devicetree for the Raspberry Pi 3.

Message ID 1457116769-8567-2-git-send-email-eric@anholt.net (mailing list archive)
State New, archived
Headers show

Commit Message

Eric Anholt March 4, 2016, 6:39 p.m. UTC
For now this doesn't support the new hardware present on the Pi 3 (BT,
wifi, GPIO expander).  Since the GPIO expander isn't supported, we
also don't have the LEDs like the other board files do.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 arch/arm/boot/dts/Makefile            |  3 +-
 arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
 arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
 3 files changed, 92 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2837.dtsi

Comments

Mark Rutland March 4, 2016, 6:41 p.m. UTC | #1
On Fri, Mar 04, 2016 at 10:39:29AM -0800, Eric Anholt wrote:
> For now this doesn't support the new hardware present on the Pi 3 (BT,
> wifi, GPIO expander).  Since the GPIO expander isn't supported, we
> also don't have the LEDs like the other board files do.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> ---
>  arch/arm/boot/dts/Makefile            |  3 +-
>  arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
>  arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
>  3 files changed, 92 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
>  create mode 100644 arch/arm/boot/dts/bcm2837.dtsi

> +	timer {
> +		compatible = "arm,armv7-timer";
> +		interrupt-parent = <&local_intc>;
> +		interrupts = <0>, // PHYS_SECURE_PPI
> +			     <1>, // PHYS_NONSECURE_PPI
> +			     <3>, // VIRT_PPI
> +			     <2>; // HYP_PPI
> +		always-on;
> +	};

Are the CPUs in an always-on power domain? Or is it jsut that the kernel
doesn't perform power management of CPUs?

The always-on proeprty is only intended for the former.

Mark.
Eric Anholt March 4, 2016, 6:55 p.m. UTC | #2
Mark Rutland <mark.rutland@arm.com> writes:

> On Fri, Mar 04, 2016 at 10:39:29AM -0800, Eric Anholt wrote:
>> For now this doesn't support the new hardware present on the Pi 3 (BT,
>> wifi, GPIO expander).  Since the GPIO expander isn't supported, we
>> also don't have the LEDs like the other board files do.
>> 
>> Signed-off-by: Eric Anholt <eric@anholt.net>
>> ---
>>  arch/arm/boot/dts/Makefile            |  3 +-
>>  arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
>>  arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
>>  3 files changed, 92 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
>>  create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
>
>> +	timer {
>> +		compatible = "arm,armv7-timer";
>> +		interrupt-parent = <&local_intc>;
>> +		interrupts = <0>, // PHYS_SECURE_PPI
>> +			     <1>, // PHYS_NONSECURE_PPI
>> +			     <3>, // VIRT_PPI
>> +			     <2>; // HYP_PPI
>> +		always-on;
>> +	};
>
> Are the CPUs in an always-on power domain? Or is it jsut that the kernel
> doesn't perform power management of CPUs?
>
> The always-on proeprty is only intended for the former.

The kernel doesn't get to do power management of CPUs.  We only have
control of power domains through the firmware, and the firmware's
keeping the CPU domain on.
Mark Rutland March 4, 2016, 6:59 p.m. UTC | #3
On Fri, Mar 04, 2016 at 10:55:03AM -0800, Eric Anholt wrote:
> Mark Rutland <mark.rutland@arm.com> writes:
> 
> > On Fri, Mar 04, 2016 at 10:39:29AM -0800, Eric Anholt wrote:
> >> For now this doesn't support the new hardware present on the Pi 3 (BT,
> >> wifi, GPIO expander).  Since the GPIO expander isn't supported, we
> >> also don't have the LEDs like the other board files do.
> >> 
> >> Signed-off-by: Eric Anholt <eric@anholt.net>
> >> ---
> >>  arch/arm/boot/dts/Makefile            |  3 +-
> >>  arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
> >>  arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
> >>  3 files changed, 92 insertions(+), 1 deletion(-)
> >>  create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
> >>  create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
> >
> >> +	timer {
> >> +		compatible = "arm,armv7-timer";
> >> +		interrupt-parent = <&local_intc>;
> >> +		interrupts = <0>, // PHYS_SECURE_PPI
> >> +			     <1>, // PHYS_NONSECURE_PPI
> >> +			     <3>, // VIRT_PPI
> >> +			     <2>; // HYP_PPI
> >> +		always-on;
> >> +	};
> >
> > Are the CPUs in an always-on power domain? Or is it jsut that the kernel
> > doesn't perform power management of CPUs?
> >
> > The always-on proeprty is only intended for the former.
> 
> The kernel doesn't get to do power management of CPUs.  We only have
> control of power domains through the firmware, and the firmware's
> keeping the CPU domain on.

So there is no way that the CPUs could request for the firmare to place
them in a state where the timer would lose context (but other events
coukd wake them up), even if they don't do that today?

Mark
Eric Anholt March 4, 2016, 7:39 p.m. UTC | #4
Mark Rutland <mark.rutland@arm.com> writes:

> On Fri, Mar 04, 2016 at 10:55:03AM -0800, Eric Anholt wrote:
>> Mark Rutland <mark.rutland@arm.com> writes:
>> 
>> > On Fri, Mar 04, 2016 at 10:39:29AM -0800, Eric Anholt wrote:
>> >> For now this doesn't support the new hardware present on the Pi 3 (BT,
>> >> wifi, GPIO expander).  Since the GPIO expander isn't supported, we
>> >> also don't have the LEDs like the other board files do.
>> >> 
>> >> Signed-off-by: Eric Anholt <eric@anholt.net>
>> >> ---
>> >>  arch/arm/boot/dts/Makefile            |  3 +-
>> >>  arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
>> >>  arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
>> >>  3 files changed, 92 insertions(+), 1 deletion(-)
>> >>  create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
>> >>  create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
>> >
>> >> +	timer {
>> >> +		compatible = "arm,armv7-timer";
>> >> +		interrupt-parent = <&local_intc>;
>> >> +		interrupts = <0>, // PHYS_SECURE_PPI
>> >> +			     <1>, // PHYS_NONSECURE_PPI
>> >> +			     <3>, // VIRT_PPI
>> >> +			     <2>; // HYP_PPI
>> >> +		always-on;
>> >> +	};
>> >
>> > Are the CPUs in an always-on power domain? Or is it jsut that the kernel
>> > doesn't perform power management of CPUs?
>> >
>> > The always-on proeprty is only intended for the former.
>> 
>> The kernel doesn't get to do power management of CPUs.  We only have
>> control of power domains through the firmware, and the firmware's
>> keeping the CPU domain on.
>
> So there is no way that the CPUs could request for the firmare to place
> them in a state where the timer would lose context (but other events
> coukd wake them up), even if they don't do that today?

I don't see any mechanism in the RPi firmware for the ARM to request
suspend or anything like that.  Enabling something like that would
definitely require an updated DT, to enable a driver that talks to the
firmware to make requests like that.

(Note that this is the same timer setup we have in bcm2836.dtsi)
Stephen Warren March 8, 2016, 5:54 a.m. UTC | #5
On 03/04/2016 11:39 AM, Eric Anholt wrote:
> For now this doesn't support the new hardware present on the Pi 3 (BT,
> wifi, GPIO expander).  Since the GPIO expander isn't supported, we
> also don't have the LEDs like the other board files do.

The series,
Acked-by: Stephen Warren <swarren@wwwdotorg.org>

... although I'd be slightly surprised if this was accepted; when 
AArch64 was first announced, I thought the mainline ARM kernel community 
decided that only 64-bit kernels would be supported on 64-bit HW? Still, 
I don't immediately see that in any commit log or in the kernel doc 
directory, so perhaps I'm misremembering. Hopefully; life is simpler 
that way:-)
diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..71082a3 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -63,7 +63,8 @@  dtb-$(CONFIG_ARCH_BCM2835) += \
 	bcm2835-rpi-b-rev2.dtb \
 	bcm2835-rpi-b-plus.dtb \
 	bcm2835-rpi-a-plus.dtb \
-	bcm2836-rpi-2-b.dtb
+	bcm2836-rpi-2-b.dtb \
+	bcm2837-rpi-3-b.dtb
 dtb-$(CONFIG_ARCH_BCM_5301X) += \
 	bcm4708-asus-rt-ac56u.dtb \
 	bcm4708-asus-rt-ac68u.dtb \
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
new file mode 100644
index 0000000..5e8eafd
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -0,0 +1,22 @@ 
+/dts-v1/;
+#include "bcm2837.dtsi"
+#include "bcm2835-rpi.dtsi"
+
+/ {
+	compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
+	model = "Raspberry Pi 3 Model B";
+
+	memory {
+		reg = <0 0x40000000>;
+	};
+};
+
+&gpio {
+	pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+
+	/* I2S interface */
+	i2s_alt0: i2s_alt0 {
+		brcm,pins = <28 29 30 31>;
+		brcm,function = <BCM2835_FSEL_ALT2>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
new file mode 100644
index 0000000..2f36722
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -0,0 +1,68 @@ 
+#include "bcm283x.dtsi"
+
+/ {
+	compatible = "brcm,bcm2836";
+
+	soc {
+		ranges = <0x7e000000 0x3f000000 0x1000000>,
+			 <0x40000000 0x40000000 0x00001000>;
+		dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
+
+		local_intc: local_intc {
+			compatible = "brcm,bcm2836-l1-intc";
+			reg = <0x40000000 0x100>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&local_intc>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupt-parent = <&local_intc>;
+		interrupts = <0>, // PHYS_SECURE_PPI
+			     <1>, // PHYS_NONSECURE_PPI
+			     <3>, // VIRT_PPI
+			     <2>; // HYP_PPI
+		always-on;
+	};
+
+	cpus: cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <1>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <2>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <3>;
+		};
+	};
+};
+
+/* Make the BCM2835-style global interrupt controller be a child of the
+ * CPU-local interrupt controller.
+ */
+&intc {
+	compatible = "brcm,bcm2836-armctrl-ic";
+	reg = <0x7e00b200 0x200>;
+	interrupt-parent = <&local_intc>;
+	interrupts = <8>;
+};