From patchwork Sat Mar 5 15:42:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vishnupatekar X-Patchwork-Id: 8510711 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DEC149F2F0 for ; Sat, 5 Mar 2016 15:45:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C08A5201CD for ; Sat, 5 Mar 2016 15:45:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3879920260 for ; Sat, 5 Mar 2016 15:45:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1acEN2-0003Po-Aj; Sat, 05 Mar 2016 15:43:56 +0000 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1acEMw-0003Mb-1H for linux-arm-kernel@lists.infradead.org; Sat, 05 Mar 2016 15:43:52 +0000 Received: by mail-pf0-x244.google.com with SMTP id x188so2886593pfb.2 for ; Sat, 05 Mar 2016 07:43:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ff+6x4A+9JLSJr4BWvpsq7rbWs+mhSGpfC7XevISOzo=; b=KXOD81stLaf3o8DdktQRTCNdt2O3ri4OzV4VPsv18Awl1ROa7rZXvjm3JYVQUwxtgn un3p8JEuQh376xwFw4G5BytsrFWwe7p5PpQvxffv6XgVFPjHsa2gjEX8ENQyRl4OXrnq bDDYQcv+JIC1aSOzUZZRiDcpgRzPalh7NAXR6FplKf2R+WVnQiH9krsXdwHATko3AG5l JshIyh1pjD8ekVE7gFb7Fp968j2aLQJcP7d8vTSjMQcKOrtJApKbjzdw0haYL0BV9onn KjA9C+NkAvL6XzD2zdH6qjnxXhaza+ZnaA5fCCKZMQvHTuihEJJuUQz8Wizjuyeb4i5z L9+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ff+6x4A+9JLSJr4BWvpsq7rbWs+mhSGpfC7XevISOzo=; b=eJioP7QlLHoRG2x6c3IbWTEHsQNKU0qBaJOgrPHj/bpLya7CHHsShKq5avI8/e6XC+ bKWIG3vW8iBvDekEHFeFtKHf/PZzgNj1gti4gz9EVVsB2iPftbwDxvYj9FGvVrJH6UTp yK1LuxiVqeWf8L1tn+DjDNs8O6vSvu3TVyrvOeCpfrkmTOcvf3lEM5kWqFmecIdKXdb7 Xjt85NclCvZVAhZ5lAe/xsht/MRks4CILlP+6LMDAooVvwxxbvbSrHvQuxcXKDzhiZH9 1SmL9l6ZlcuZwxFvDOVQczYniXmAR3ViQkGKz4/h+LL5Kg1XhJqNRgJ+2xi13ahr+3i5 Jq/Q== X-Gm-Message-State: AD7BkJKyldHh8oL/4b53J9CgLAoQ714mUlIx4BwCtG7aUY5SD3ID0GeDv04jwM+cjetcgg== X-Received: by 10.98.10.86 with SMTP id s83mr20953217pfi.85.1457192609340; Sat, 05 Mar 2016 07:43:29 -0800 (PST) Received: from localhost.localdomain ([101.127.161.160]) by smtp.gmail.com with ESMTPSA id ah10sm13230527pad.23.2016.03.05.07.43.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 05 Mar 2016 07:43:28 -0800 (PST) From: Vishnu Patekar To: robh+dt@kernel.org, corbet@lwn.net, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, maxime.ripard@free-electrons.com, linux@arm.linux.org.uk, emilio@elopez.com.ar Subject: [PATCH v3 01/13] pinctrl: sunxi: Add A83T R_PIO controller support Date: Sat, 5 Mar 2016 23:42:54 +0800 Message-Id: <1457192586-25596-2-git-send-email-vishnupatekar0510@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457192586-25596-1-git-send-email-vishnupatekar0510@gmail.com> References: <1457192586-25596-1-git-send-email-vishnupatekar0510@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160305_074350_309012_F478E94F X-CRM114-Status: GOOD ( 16.04 ) X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, patchesrdh@mveas.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, hdegoede@redhat.com, wens@csie.org, mturquette@baylibre.com, jenskuske@gmail.com, linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai Acked-by: Rob Herring --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kconfig | 5 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 119 +++++++++++++++++++++ 4 files changed, 126 insertions(+) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt index 9213b27..f9ff10b 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt @@ -20,6 +20,7 @@ Required properties: "allwinner,sun9i-a80-pinctrl" "allwinner,sun9i-a80-r-pinctrl" "allwinner,sun8i-a83t-pinctrl" + "allwinner,sun8i-a83t-r-pinctrl" "allwinner,sun8i-h3-pinctrl" - reg: Should contain the register physical address and length for the diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig index f8dbc8b..eeab50b 100644 --- a/drivers/pinctrl/sunxi/Kconfig +++ b/drivers/pinctrl/sunxi/Kconfig @@ -51,6 +51,11 @@ config PINCTRL_SUN8I_A23_R depends on RESET_CONTROLLER select PINCTRL_SUNXI_COMMON +config PINCTRL_SUN8I_A83T_R + def_bool MACH_SUN8I + depends on RESET_CONTROLLER + select PINCTRL_SUNXI_COMMON + config PINCTRL_SUN8I_H3 def_bool MACH_SUN8I select PINCTRL_SUNXI_COMMON diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile index ef82f22..bfd4fa0 100644 --- a/drivers/pinctrl/sunxi/Makefile +++ b/drivers/pinctrl/sunxi/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_PINCTRL_SUN8I_A23) += pinctrl-sun8i-a23.o obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o +obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c new file mode 100644 index 0000000..11787894 --- /dev/null +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c @@ -0,0 +1,119 @@ +/* + * Allwinner A83T SoCs special pins pinctrl driver. + * + * Copyright (C) 2016 Vishnu Patekar + * Vishnu Patekar + * + * Based on pinctrl-sun8i-a23.c, which is: + * Copyright (C) 2014 Chen-Yu Tsai + * Copyright (C) 2014 Maxime Ripard + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include + +#include "pinctrl-sunxi.h" + +static const struct sunxi_desc_pin sun8i_a83t_r_pins[] = { + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */ + SUNXI_FUNCTION(0x3, "s_twi"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */ + SUNXI_FUNCTION(0x3, "s_twi"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_uart"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_uart"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_pwm"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_cir"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT12 */ +}; + +static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_data = { + .pins = sun8i_a83t_r_pins, + .npins = ARRAY_SIZE(sun8i_a83t_r_pins), + .pin_base = PL_BASE, + .irq_banks = 1, +}; + +static int sun8i_a83t_r_pinctrl_probe(struct platform_device *pdev) +{ + return sunxi_pinctrl_init(pdev, &sun8i_a83t_r_pinctrl_data); +} + +static const struct of_device_id sun8i_a83t_r_pinctrl_match[] = { + { .compatible = "allwinner,sun8i-a83t-r-pinctrl", }, + {} +}; +MODULE_DEVICE_TABLE(of, sun8i_a83t_r_pinctrl_match); + +static struct platform_driver sun8i_a83t_r_pinctrl_driver = { + .probe = sun8i_a83t_r_pinctrl_probe, + .driver = { + .name = "sun8i-a83t-r-pinctrl", + .of_match_table = sun8i_a83t_r_pinctrl_match, + }, +}; +module_platform_driver(sun8i_a83t_r_pinctrl_driver);