From patchwork Sat Mar 5 15:43:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vishnupatekar X-Patchwork-Id: 8510801 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2ECFFC0553 for ; Sat, 5 Mar 2016 15:47:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 58C25201CE for ; Sat, 5 Mar 2016 15:47:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7FD65201CD for ; Sat, 5 Mar 2016 15:47:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1acEOt-0005ue-3S; Sat, 05 Mar 2016 15:45:51 +0000 Received: from mail-pa0-x241.google.com ([2607:f8b0:400e:c03::241]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1acENT-0003RE-Nz for linux-arm-kernel@lists.infradead.org; Sat, 05 Mar 2016 15:44:26 +0000 Received: by mail-pa0-x241.google.com with SMTP id a7so4831600pax.3 for ; Sat, 05 Mar 2016 07:44:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=I0QcRbQyGirhSHmXhlMQQC6PrI5nM8iPjDdxJeXZIas=; b=u51W3KPVgeQzEL/7TPJnyesPEmdAn+gPzmXzPFd5oa988blabgDbDcU4un7xhTkOKh 66g4hd6FokzABVaXCGKAkHVDG3cTwj6UjK2V6YEjPPS24lGtV2rBk2hLDDEyFRE/cj8L rdSQg0wns+gZGGQx0Z9Elpj08a8KXmlx2VQdwewCkfAbZdmgbxY/NPVPbkw7y9H+0YWR Tk7g2KTjpv0KoIaEGmtfx3x+p2lHPrhiqIHuHJvBe787WXugYcHrodvZeadeQc1NnEx+ 33w9LZ9RXJ3jRDtDpGvH31KhNQe+34Fkc+vqAxWbVfVF7IcsSjgaGkeMka8xrc4LvOad gm0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=I0QcRbQyGirhSHmXhlMQQC6PrI5nM8iPjDdxJeXZIas=; b=ZqR6jond0QsEU96F+SzFKwj+6ggJN0NrZ+ueVoS49rl3kKgLPPOCLUT5a4F/dSx9Nh Oe1Y+vtb6Id+LOyD9KIs1z+7XnKJ6cf7qRoKmwJ76RD/GPl1F3984jz/sUdFLsxjJjCK 7wXo3MsTbsjaSOg+J4t4nrMdygZMokRdcxFxBmll2e5NIe2Ol5xBCLauew7idWSm5jp0 XzJUDkvdiM7dBOXQJzf5qMk/ksmS0Tpcqgr4v1A9HPxWdIbbj8cMD3qgDsd0Lsaxy6ZS Aub0V3+cKtbSvZJiKVUqx6sCLIVF5kpQAunBjWE8DbCn3Qq3GmaI46o+ttJJqi1dsjwU 3gFQ== X-Gm-Message-State: AD7BkJKOP8i0Sv8ucvyOxCNPYLu8FCfs375DuhnMR1YCJxGb+dY3RzrXnoyDsic+Ty+XtA== X-Received: by 10.66.235.129 with SMTP id um1mr20633754pac.17.1457192642972; Sat, 05 Mar 2016 07:44:02 -0800 (PST) Received: from localhost.localdomain ([101.127.161.160]) by smtp.gmail.com with ESMTPSA id ah10sm13230527pad.23.2016.03.05.07.43.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 05 Mar 2016 07:44:02 -0800 (PST) From: Vishnu Patekar To: robh+dt@kernel.org, corbet@lwn.net, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, maxime.ripard@free-electrons.com, linux@arm.linux.org.uk, emilio@elopez.com.ar Subject: [PATCH v3 07/13] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets Date: Sat, 5 Mar 2016 23:43:00 +0800 Message-Id: <1457192586-25596-8-git-send-email-vishnupatekar0510@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457192586-25596-1-git-send-email-vishnupatekar0510@gmail.com> References: <1457192586-25596-1-git-send-email-vishnupatekar0510@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160305_074424_259331_5A3D857C X-CRM114-Status: UNSURE ( 8.72 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, patchesrdh@mveas.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, hdegoede@redhat.com, wens@csie.org, mturquette@baylibre.com, jenskuske@gmail.com, linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 44 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index a44d4dc..691bbf1 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -267,6 +267,44 @@ "mmc2_output", "mmc2_sample"; }; + + cpus_clk: clk@01f01400 { + compatible = "allwinner,sun9i-a80-cpus-clk"; + reg = <0x01f01400 0x4>; + #clock-cells = <0>; + clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&osc16M>; + clock-output-names = "cpus"; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&cpus_clk>; + clock-output-names = "ahb0"; + }; + + apb0: clk@01f0140c { + compatible = "allwinner,sun8i-a23-apb0-clk"; + reg = <0x01f0140c 0x4>; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + + apb0_gates: clk@01f01428 { + compatible = "allwinner,sun8i-a83t-apb0-gates-clk"; + reg = <0x01f01428 0x4>; + #clock-cells = <1>; + clocks = <&apb0>; + clock-indices = <0>, <1>, + <2>, <3>, + <4>, <6>, <7>; + clock-output-names = "apb0_pio", "apb0_ir", + "apb0_timer", "apb0_rsb", + "apb0_uart", "apb0_i2c0", "apb0_twd"; + }; }; soc { @@ -421,5 +459,11 @@ #interrupt-cells = <3>; interrupts = ; }; + + apb0_reset: reset@01f014b0 { + reg = <0x01f014b0 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; }; };