| Message ID | 1457516519-15319-1-git-send-email-carlo@caione.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Mar 9, 2016 at 10:41 AM, Carlo Caione <carlo@caione.org> wrote: > From: Carlo Caione <carlo@endlessm.com> > > Fix pin controller documentation introducing the new compatibles for > the pinctrl drivers specific for aobus / cbus. > > This is needed because we have changed the pin controller driver: we > have now a single specialized pinctrl driver / compatible for each bus > the controller is attached to, instead of one single driver dealing with > all the controllers we have on different buses. > > Signed-off-by: Carlo Caione <carlo@endlessm.com> > --- > Hey Rob, > I'm resubmitting a V2 only for this patch since the driver changes have > been already taken by Linus. (...) > Required properties for the root node: > - - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" > + - compatible: one of "amlogic,meson8-cbus-pinctrl" > + "amlogic,meson8b-cbus-pinctrl" > + "amlogic,meson8-aobus-pinctrl" > + "amlogic,meson8b-aobus-pinctrl" I guess I just have to merge this. It (IIUC) turns out that the driver is beta and prototypeish and the DT bindings were too early to be etched in stone, and any old device trees using it are not really working anyways. We prefer that this not happen because we have a serious control issue when it comes to bindings, but sometimes it happens anyways. Like with divorces and other unfortunate stuff like that. Rob are you OK with this change? Yours, Linus Walleij
On Tue, Mar 15, 2016 at 10:10 AM, Linus Walleij <linus.walleij@linaro.org> wrote: > On Wed, Mar 9, 2016 at 10:41 AM, Carlo Caione <carlo@caione.org> wrote: > >> From: Carlo Caione <carlo@endlessm.com> >> >> Fix pin controller documentation introducing the new compatibles for >> the pinctrl drivers specific for aobus / cbus. >> >> This is needed because we have changed the pin controller driver: we >> have now a single specialized pinctrl driver / compatible for each bus >> the controller is attached to, instead of one single driver dealing with >> all the controllers we have on different buses. >> >> Signed-off-by: Carlo Caione <carlo@endlessm.com> >> --- >> Hey Rob, >> I'm resubmitting a V2 only for this patch since the driver changes have >> been already taken by Linus. > (...) >> Required properties for the root node: >> - - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" >> + - compatible: one of "amlogic,meson8-cbus-pinctrl" >> + "amlogic,meson8b-cbus-pinctrl" >> + "amlogic,meson8-aobus-pinctrl" >> + "amlogic,meson8b-aobus-pinctrl" > > I guess I just have to merge this. It (IIUC) turns out that the driver is beta > and prototypeish and the DT bindings were too early to be etched in stone, > and any old device trees using it are not really working anyways. They are working but the platform support is so primitive (still trying to upstream the MMC driver) that really I wouldn't be too concerned of breaking the DT bindings at this stage of the development. On the bright side we learned a lot from the Meson8b architecture so for mesongxbb things should be smoother. > We prefer that this not happen because we have a serious control issue > when it comes to bindings, but sometimes it happens anyways. Like > with divorces and other unfortunate stuff like that. I know and agree with this, hopefully this will be a one time issue. Thanks, I'll pick the DTS changes as soon as Rob ACKs this.
Linus Walleij <linus.walleij@linaro.org> writes: > On Wed, Mar 9, 2016 at 10:41 AM, Carlo Caione <carlo@caione.org> wrote: > >> From: Carlo Caione <carlo@endlessm.com> >> >> Fix pin controller documentation introducing the new compatibles for >> the pinctrl drivers specific for aobus / cbus. >> >> This is needed because we have changed the pin controller driver: we >> have now a single specialized pinctrl driver / compatible for each bus >> the controller is attached to, instead of one single driver dealing with >> all the controllers we have on different buses. >> >> Signed-off-by: Carlo Caione <carlo@endlessm.com> >> --- >> Hey Rob, >> I'm resubmitting a V2 only for this patch since the driver changes have >> been already taken by Linus. > (...) >> Required properties for the root node: >> - - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" >> + - compatible: one of "amlogic,meson8-cbus-pinctrl" >> + "amlogic,meson8b-cbus-pinctrl" >> + "amlogic,meson8-aobus-pinctrl" >> + "amlogic,meson8b-aobus-pinctrl" > > I guess I just have to merge this. It (IIUC) turns out that the driver is beta > and prototypeish and the DT bindings were too early to be etched in stone, > and any old device trees using it are not really working anyways. > > We prefer that this not happen because we have a serious control issue > when it comes to bindings, but sometimes it happens anyways. Like > with divorces and other unfortunate stuff like that. > > Rob are you OK with this change? Also, FYI, the driver change was merged without the corresponding DT, so this broke booting in linux-next, so either we merge the DT/bindings (preferred) or we revert the driver change until the DT/bindings are sorted out. Kevin
Am 09.03.2016 um 10:41 schrieb Carlo Caione: > From: Carlo Caione <carlo@endlessm.com> > > Fix pin controller documentation introducing the new compatibles for > the pinctrl drivers specific for aobus / cbus. > > This is needed because we have changed the pin controller driver: we > have now a single specialized pinctrl driver / compatible for each bus > the controller is attached to, instead of one single driver dealing with > all the controllers we have on different buses. > > Signed-off-by: Carlo Caione <carlo@endlessm.com> > --- > Hey Rob, > I'm resubmitting a V2 only for this patch since the driver changes have > been already taken by Linus. > > Thanks, > --- > .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 38 ++++------------------ > 1 file changed, 7 insertions(+), 31 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt > index 3f6a524..ca6d283 100644 > --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt > @@ -1,13 +1,16 @@ > == Amlogic Meson pinmux controller == > > Required properties for the root node: > - - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" > + - compatible: one of "amlogic,meson8-cbus-pinctrl" > + "amlogic,meson8b-cbus-pinctrl" > + "amlogic,meson8-aobus-pinctrl" > + "amlogic,meson8b-aobus-pinctrl" > - reg: address and size of registers controlling irq functionality > > === GPIO sub-nodes === > > -The 2 power domains of the controller (regular and always-on) are > -represented as sub-nodes and each of them acts as a GPIO controller. > +Each power domain of the controller (regular and always-on) is > +represented as a sub-node and it acts as a GPIO controller. This paragraph still sounds outdated to me: With regular and always-on being separate devices now, there is no "and" here, nor different power domains as "GPIO sub-nodes" (heading). Otherwise looks okay to me, and +1 for doing the incompatible split. gxbb already models cbus and aobus as simple-bus'es. Regards, Andreas > > Required properties for sub-nodes are: > - reg: should contain address and size for mux, pull-enable, pull and > @@ -18,10 +21,6 @@ Required properties for sub-nodes are: > - gpio-controller: identifies the node as a gpio controller > - #gpio-cells: must be 2 > > -Valid sub-node names are: > - - "banks" for the regular domain > - - "ao-bank" for the always-on domain > - > === Other sub-nodes === > > Child nodes without the "gpio-controller" represent some desired > @@ -45,7 +44,7 @@ pinctrl-bindings.txt > === Example === > > pinctrl: pinctrl@c1109880 { > - compatible = "amlogic,meson8-pinctrl"; > + compatible = "amlogic,meson8-cbus-pinctrl"; > reg = <0xc1109880 0x10>; > #address-cells = <1>; > #size-cells = <1>; > @@ -61,15 +60,6 @@ pinctrl-bindings.txt > #gpio-cells = <2>; > }; > > - gpio_ao: ao-bank@c1108030 { > - reg = <0xc8100014 0x4>, > - <0xc810002c 0x4>, > - <0xc8100024 0x8>; > - reg-names = "mux", "pull", "gpio"; > - gpio-controller; > - #gpio-cells = <2>; > - }; > - > nand { > mux { > groups = "nand_io", "nand_io_ce0", "nand_io_ce1", > @@ -79,18 +69,4 @@ pinctrl-bindings.txt > function = "nand"; > }; > }; > - > - uart_ao_a { > - mux { > - groups = "uart_tx_ao_a", "uart_rx_ao_a", > - "uart_cts_ao_a", "uart_rts_ao_a"; > - function = "uart_ao"; > - }; > - > - conf { > - pins = "GPIOAO_0", "GPIOAO_1", > - "GPIOAO_2", "GPIOAO_3"; > - bias-disable; > - }; > - }; > }; >
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt index 3f6a524..ca6d283 100644 --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt @@ -1,13 +1,16 @@ == Amlogic Meson pinmux controller == Required properties for the root node: - - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" + - compatible: one of "amlogic,meson8-cbus-pinctrl" + "amlogic,meson8b-cbus-pinctrl" + "amlogic,meson8-aobus-pinctrl" + "amlogic,meson8b-aobus-pinctrl" - reg: address and size of registers controlling irq functionality === GPIO sub-nodes === -The 2 power domains of the controller (regular and always-on) are -represented as sub-nodes and each of them acts as a GPIO controller. +Each power domain of the controller (regular and always-on) is +represented as a sub-node and it acts as a GPIO controller. Required properties for sub-nodes are: - reg: should contain address and size for mux, pull-enable, pull and @@ -18,10 +21,6 @@ Required properties for sub-nodes are: - gpio-controller: identifies the node as a gpio controller - #gpio-cells: must be 2 -Valid sub-node names are: - - "banks" for the regular domain - - "ao-bank" for the always-on domain - === Other sub-nodes === Child nodes without the "gpio-controller" represent some desired @@ -45,7 +44,7 @@ pinctrl-bindings.txt === Example === pinctrl: pinctrl@c1109880 { - compatible = "amlogic,meson8-pinctrl"; + compatible = "amlogic,meson8-cbus-pinctrl"; reg = <0xc1109880 0x10>; #address-cells = <1>; #size-cells = <1>; @@ -61,15 +60,6 @@ pinctrl-bindings.txt #gpio-cells = <2>; }; - gpio_ao: ao-bank@c1108030 { - reg = <0xc8100014 0x4>, - <0xc810002c 0x4>, - <0xc8100024 0x8>; - reg-names = "mux", "pull", "gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - nand { mux { groups = "nand_io", "nand_io_ce0", "nand_io_ce1", @@ -79,18 +69,4 @@ pinctrl-bindings.txt function = "nand"; }; }; - - uart_ao_a { - mux { - groups = "uart_tx_ao_a", "uart_rx_ao_a", - "uart_cts_ao_a", "uart_rts_ao_a"; - function = "uart_ao"; - }; - - conf { - pins = "GPIOAO_0", "GPIOAO_1", - "GPIOAO_2", "GPIOAO_3"; - bias-disable; - }; - }; };