From patchwork Wed Mar 9 10:10:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yankejian X-Patchwork-Id: 8544361 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6F0339F46A for ; Wed, 9 Mar 2016 09:53:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 810ED20263 for ; Wed, 9 Mar 2016 09:53:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9A1452021A for ; Wed, 9 Mar 2016 09:53:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1adan1-000421-Cq; Wed, 09 Mar 2016 09:52:23 +0000 Received: from szxga02-in.huawei.com ([119.145.14.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1adamw-0003iB-KQ for linux-arm-kernel@lists.infradead.org; Wed, 09 Mar 2016 09:52:21 +0000 Received: from 172.24.1.51 (EHLO szxeml433-hub.china.huawei.com) ([172.24.1.51]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DCZ90608; Wed, 09 Mar 2016 17:51:01 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by szxeml433-hub.china.huawei.com (10.82.67.210) with Microsoft SMTP Server id 14.3.235.1; Wed, 9 Mar 2016 17:50:53 +0800 From: Kejian Yan To: Subject: [patch RESEND net] net: hns: fix the bug about mtu setting Date: Wed, 9 Mar 2016 18:10:01 +0800 Message-ID: <1457518201-199863-1-git-send-email-yankejian@huawei.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.56DFF207.010A, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 12fdea22587e12f6670f8eed282c89b5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160309_015219_280270_013DE534 X-CRM114-Status: GOOD ( 14.89 ) X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ivecera@redhat.com, andrew@lunn.ch, salil.mehta@huawei.com, fengguang.wu@intel.com, liguozhu@huawei.com, haifeng.wei@huawei.com, arnd@arndb.de, lisheng011@huawei.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linuxarm@huawei.com, chenny.xu@huawei.com, huangdaode@hisilicon.com, andriy.shevchenko@linux.intel.com, yisen.zhuang@huawei.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In chip V1, the maximum mtu value is 9600 for service ports and 1514 for debug ports. And in chip V2, it is 9728 for service ports and 1514 for debug ports. But it is always configurates as 9600 before this patch. This patch will configurate the right mtu value. Signed-off-by: Kejian Yan --- drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c | 7 ++++++- drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h | 2 ++ drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c | 3 +++ drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h | 2 ++ 4 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c index 5ef0e96..65b8d91 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c @@ -467,8 +467,13 @@ int hns_mac_set_mtu(struct hns_mac_cb *mac_cb, u32 new_mtu) struct mac_driver *drv = hns_mac_get_drv(mac_cb); u32 buf_size = mac_cb->dsaf_dev->buf_size; u32 new_frm = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; + u32 max_frm = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver) ? + MAC_MAX_MTU : MAC_MAX_MTU_V2; - if ((new_mtu < MAC_MIN_MTU) || (new_frm > MAC_MAX_MTU) || + if (mac_cb->mac_type == HNAE_PORT_DEBUG) + max_frm = MAC_MAX_MTU_DBG; + + if ((new_mtu < MAC_MIN_MTU) || (new_frm > max_frm) || (new_frm > HNS_RCB_RING_MAX_BD_PER_PKT * buf_size)) return -EINVAL; diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h index 0b05219..fc51e3d 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h @@ -26,7 +26,9 @@ struct dsaf_device; #define MAC_DEFAULT_MTU (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN + ETH_DATA_LEN) #define MAC_MAX_MTU 9600 +#define MAC_MAX_MTU_V2 9728 #define MAC_MIN_MTU 68 +#define MAC_MAX_MTU_DBG MAC_DEFAULT_MTU #define MAC_DEFAULT_PAUSE_TIME 0xff diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c index f302ef9..7a61c57 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c @@ -343,6 +343,9 @@ static void hns_ppe_init_hw(struct hns_ppe_cb *ppe_cb) if (!AE_IS_VER1(dsaf_dev->dsaf_ver)) { hns_ppe_set_vlan_strip(ppe_cb, 0); + dsaf_write_dev(ppe_cb, PPE_CFG_MAX_FRAME_LEN_REG, + HNS_PPEV2_MAX_FRAME_LEN); + /* set default RSS key in h/w */ hns_ppe_set_rss_key(ppe_cb, ppe_cb->rss_key); diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h index 0f5cb69..e9c0ec2 100644 --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h @@ -30,6 +30,8 @@ #define HNS_PPEV2_RSS_KEY_SIZE 40 /* in bytes or 320 bits */ #define HNS_PPEV2_RSS_KEY_NUM (HNS_PPEV2_RSS_KEY_SIZE / sizeof(u32)) +#define HNS_PPEV2_MAX_FRAME_LEN 0X980 + enum ppe_qid_mode { PPE_QID_MODE0 = 0, /* fixed queue id mode */ PPE_QID_MODE1, /* switch:128VM non switch:6Port/4VM/4TC */