From patchwork Thu Mar 17 08:34:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "majun (F)" X-Patchwork-Id: 8608151 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6FD46C0554 for ; Thu, 17 Mar 2016 08:37:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C4FF20279 for ; Thu, 17 Mar 2016 08:37:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B1658201CD for ; Thu, 17 Mar 2016 08:37:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1agTPN-0002PS-IT; Thu, 17 Mar 2016 08:35:53 +0000 Received: from szxga02-in.huawei.com ([119.145.14.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1agTP7-0000df-EJ for linux-arm-kernel@lists.infradead.org; Thu, 17 Mar 2016 08:35:40 +0000 Received: from 172.24.1.60 (EHLO szxeml434-hub.china.huawei.com) ([172.24.1.60]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DDR41787; Thu, 17 Mar 2016 16:34:16 +0800 (CST) Received: from localhost (10.177.235.245) by szxeml434-hub.china.huawei.com (10.82.67.225) with Microsoft SMTP Server id 14.3.235.1; Thu, 17 Mar 2016 16:34:05 +0800 From: MaJun To: , , , , , , , , , , , , , , Subject: [PATCH v3 2/2] irqchip/mbigen:Change the mbigen driver based on the new mbigen node definition. Date: Thu, 17 Mar 2016 16:34:01 +0800 Message-ID: <1458203641-17172-3-git-send-email-majun258@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1458203641-17172-1-git-send-email-majun258@huawei.com> References: <1458203641-17172-1-git-send-email-majun258@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.235.245] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.56EA6C09.0009, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 9e1fde47962185b0f2812b9cec1e7d9e X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160317_013537_944163_18C2051E X-CRM114-Status: GOOD ( 13.71 ) X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ma Jun In current mbigen driver, each mbigen device is initialized as a platform device. When these devices belong to same mbigen hardware module(chip), they use the same register definition in their device node and caused the problem of registers remapped repeatedly. Now, I try to initialize the mbigen module(chip) as a platform device and remap the register once to fix this problem. Signed-off-by: Ma Jun --- drivers/irqchip/irq-mbigen.c | 30 +++++++++++++++++++++--------- 1 files changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c index 4dd3eb8..4d413bc 100644 --- a/drivers/irqchip/irq-mbigen.c +++ b/drivers/irqchip/irq-mbigen.c @@ -242,6 +242,8 @@ static int mbigen_device_probe(struct platform_device *pdev) struct resource *res; struct irq_domain *domain; u32 num_pins; + struct platform_device *child_pdev; + struct device_node *np; mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL); if (!mgn_chip) @@ -251,25 +253,35 @@ static int mbigen_device_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); mgn_chip->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(mgn_chip->base)) return PTR_ERR(mgn_chip->base); - if (of_property_read_u32(pdev->dev.of_node, "num-pins", &num_pins) < 0) { - dev_err(&pdev->dev, "No num-pins property\n"); - return -EINVAL; - } + for_each_child_of_node(pdev->dev.of_node, np) { + if (!of_property_read_bool(np, "interrupt-controller")) + continue; + + child_pdev = of_platform_device_create(np, NULL, platform_bus_type.dev_root); + if (IS_ERR(child_pdev)) + return PTR_ERR(child_pdev); + + if (of_property_read_u32(child_pdev->dev.of_node, "num-pins", &num_pins) < 0) { + dev_err(&pdev->dev, "No num-pins property\n"); + return -EINVAL; + } - domain = platform_msi_create_device_domain(&pdev->dev, num_pins, + domain = platform_msi_create_device_domain(&child_pdev->dev, num_pins, mbigen_write_msg, &mbigen_domain_ops, mgn_chip); - if (!domain) - return -ENOMEM; + if (!domain) + return -ENOMEM; - platform_set_drvdata(pdev, mgn_chip); + dev_info(&child_pdev->dev, "Allocated %d MSIs\n", num_pins); + } - dev_info(&pdev->dev, "Allocated %d MSIs\n", num_pins); + platform_set_drvdata(pdev, mgn_chip); return 0; }