From patchwork Mon Mar 21 12:20:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Potthuri X-Patchwork-Id: 8632081 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3E27E9F6E1 for ; Mon, 21 Mar 2016 12:22:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 327562017E for ; Mon, 21 Mar 2016 12:22:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 09A6020125 for ; Mon, 21 Mar 2016 12:22:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ahypu-0002sL-SJ; Mon, 21 Mar 2016 12:21:30 +0000 Received: from mail-bl2nam02on0065.outbound.protection.outlook.com ([104.47.38.65] helo=NAM02-BL2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ahypb-0002gq-45; Mon, 21 Mar 2016 12:21:12 +0000 Received: from BL2NAM02FT043.eop-nam02.prod.protection.outlook.com (10.152.76.54) by BL2NAM02HT118.eop-nam02.prod.protection.outlook.com (10.152.76.250) with Microsoft SMTP Server (TLS) id 15.1.443.6; Mon, 21 Mar 2016 12:20:49 +0000 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; Received: from xsj-pvapsmtpgw01 (149.199.60.83) by BL2NAM02FT043.mail.protection.outlook.com (10.152.77.95) with Microsoft SMTP Server (TLS) id 15.1.443.6 via Frontend Transport; Mon, 21 Mar 2016 12:20:48 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.63) (envelope-from ) id 1ahypD-0005GA-OW; Mon, 21 Mar 2016 05:20:47 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1ahypD-0008Pj-KK; Mon, 21 Mar 2016 05:20:47 -0700 Received: from xsj-pvapsmtp01 (smtp.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id u2LCKim7022608; Mon, 21 Mar 2016 05:20:44 -0700 Received: from [172.23.146.172] (helo=xhdl3764.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1ahyp9-0008P7-Nf; Mon, 21 Mar 2016 05:20:43 -0700 Received: by xhdl3764.xilinx.com (Postfix, from userid 14964) id E3ACD1A2046C; Mon, 21 Mar 2016 17:50:42 +0530 (IST) From: P L Sai Krishna To: Michal Simek , Soren Brinkmann , David Woodhouse , "Brian Norris" , Mark Brown , "Javier Martinez Canillas" , Boris Brezillon , Stephen Warren , Geert Uytterhoeven , "Andrew F. Davis" , Marek Vasut , Jagan Teki , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Subject: [LINUX PATCH 2/2] spi:zynqmp:gqspi: Added separate dummy entry. Date: Mon, 21 Mar 2016 17:50:09 +0530 Message-ID: <1458562809-36114-2-git-send-email-lakshmis@xilinx.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: <1458562809-36114-1-git-send-email-lakshmis@xilinx.com> References: <1458562809-36114-1-git-send-email-lakshmis@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22206.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(47776003)(229853001)(87936001)(92566002)(42186005)(63266004)(6806005)(5003940100001)(19580405001)(86362001)(11100500001)(103686003)(33646002)(52956003)(19580395003)(106466001)(2950100001)(5008740100001)(46386002)(50466002)(5001770100001)(2906002)(45336002)(76176999)(50986999)(189998001)(36386004)(586003)(50226001)(1096002)(48376002)(90966002)(1220700001)(36756003)(4001430100002)(107886002)(81166005)(921003)(107986001)(1121003)(217873001); DIR:OUT; SFP:1101; SCL:1; SRVR:BL2NAM02HT118; H:xsj-pvapsmtpgw01; FPR:; SPF:Pass; MLV:sfv; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: fe1e8482-011c-4e7d-81e5-08d351833c97 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(8251501002); SRVR:BL2NAM02HT118; X-Microsoft-Antispam-PRVS: <4f5f1de783964363823a3312ca12c1bd@BL2NAM02HT118.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(8121501046)(13018025)(5005006)(13017025)(13023025)(13024025)(13015025)(10201501046)(3002001); SRVR:BL2NAM02HT118; BCL:0; PCL:0; RULEID:; SRVR:BL2NAM02HT118; X-Forefront-PRVS: 0888B1D284 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2016 12:20:48.5999 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2NAM02HT118 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160321_052111_411518_C5AEA58E X-CRM114-Status: GOOD ( 16.02 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Harini Katakam , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, P L Sai Krishna , Anirudha Sarangi , Punnaiah Choudary Kalluri , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch sends dummy as a separate entry. Break the Address+Cmd+dummy transfer into multiple transfers. Address+Cmd as one transfer. Dummy cycles as another transfer. As per the controller spec, immediate data field of dummy entry in the GenFifo represent dummy cycles. Bus width for dummy cycles transfer should be same as Rx bus width. Signed-off-by: P L Sai Krishna --- drivers/spi/spi-zynqmp-gqspi.c | 57 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index aab9b49..9393b1e 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -134,6 +134,9 @@ #define GQSPI_SELECT_MODE_QUADSPI 0x4 #define GQSPI_DMA_UNALIGN 0x3 #define GQSPI_DEFAULT_NUM_CS 1 /* Default number of chip selects */ +#define GQSPI_RX_BUS_WIDTH_QUAD 0x4 +#define GQSPI_RX_BUS_WIDTH_DUAL 0x2 +#define GQSPI_RX_BUS_WIDTH_SINGLE 0x1 enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; @@ -169,6 +172,7 @@ struct zynqmp_qspi { u32 genfifobus; u32 dma_rx_bytes; dma_addr_t dma_addr; + u32 rx_bus_width; u32 genfifoentry; enum mode_type mode; }; @@ -541,6 +545,35 @@ static void zynqmp_qspi_filltxfifo(struct zynqmp_qspi *xqspi, int size) } /** + * zynqmp_qspi_preparedummy: Prepares the dummy entry + * + * @xqspi: Pointer to the zynqmp_qspi structure + * @transfer: It is a pointer to the structure containing transfer data. + * @genfifoentry: genfifoentry is pointer to the variable in which + * GENFIFO mask is returned to calling function + */ +static void zynqmp_qspi_preparedummy(struct zynqmp_qspi *xqspi, + struct spi_transfer *transfer, + u32 *genfifoentry) +{ + /* For dummy Tx and Rx are NULL */ + *genfifoentry &= ~(GQSPI_GENFIFO_TX | GQSPI_GENFIFO_RX); + + /* SPI mode */ + *genfifoentry &= ~GQSPI_GENFIFO_MODE_QUADSPI; + if (xqspi->rx_bus_width == GQSPI_RX_BUS_WIDTH_QUAD) + *genfifoentry |= GQSPI_GENFIFO_MODE_QUADSPI; + else if (xqspi->rx_bus_width == GQSPI_RX_BUS_WIDTH_DUAL) + *genfifoentry |= GQSPI_GENFIFO_MODE_DUALSPI; + else + *genfifoentry |= GQSPI_GENFIFO_MODE_SPI; + + /* Immediate data */ + *genfifoentry &= ~GQSPI_GENFIFO_IMM_DATA_MASK; + *genfifoentry |= transfer->dummy; +} + +/** * zynqmp_qspi_readrxfifo: Fills the RX FIFO as long as there is room in * the FIFO. * @xqspi: Pointer to the zynqmp_qspi structure @@ -771,7 +804,7 @@ static void zynqmp_qspi_txrxsetup(struct zynqmp_qspi *xqspi, *genfifoentry |= GQSPI_GENFIFO_TX; *genfifoentry |= zynqmp_qspi_selectspimode(xqspi, transfer->tx_nbits); - xqspi->bytes_to_transfer = transfer->len; + xqspi->bytes_to_transfer = transfer->len - (transfer->dummy/8); if (xqspi->mode == GQSPI_MODE_DMA) { config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); @@ -832,13 +865,19 @@ static int zynqmp_qspi_start_transfer(struct spi_master *master, if (xqspi->mode == GQSPI_MODE_DMA) transfer_len = xqspi->dma_rx_bytes; else - transfer_len = transfer->len; + transfer_len = transfer->len - (transfer->dummy/8); xqspi->genfifoentry = genfifoentry; if ((transfer_len) < GQSPI_GENFIFO_IMM_DATA_MASK) { genfifoentry &= ~GQSPI_GENFIFO_IMM_DATA_MASK; genfifoentry |= transfer_len; zynqmp_gqspi_write(xqspi, GQSPI_GEN_FIFO_OFST, genfifoentry); + if (transfer->dummy) { + zynqmp_qspi_preparedummy(xqspi, transfer, + &genfifoentry); + zynqmp_gqspi_write(xqspi, GQSPI_GEN_FIFO_OFST, + genfifoentry); + } } else { int tempcount = transfer_len; u32 exponent = 8; /* 2^8 = 256 */ @@ -979,6 +1018,8 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) struct zynqmp_qspi *xqspi; struct resource *res; struct device *dev = &pdev->dev; + struct device_node *nc; + u32 rx_bus_width; master = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); if (!master) @@ -1039,6 +1080,18 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) goto clk_dis_all; } + xqspi->rx_bus_width = GQSPI_RX_BUS_WIDTH_SINGLE; + for_each_available_child_of_node(pdev->dev.of_node, nc) { + ret = of_property_read_u32(nc, "spi-rx-bus-width", + &rx_bus_width); + if (!ret) { + xqspi->rx_bus_width = rx_bus_width; + break; + } + } + if (ret) + dev_err(dev, "rx bus width not found\n"); + master->num_chipselect = GQSPI_DEFAULT_NUM_CS; master->setup = zynqmp_qspi_setup;