From patchwork Tue Mar 22 20:23:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 8645171 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 02156C0553 for ; Tue, 22 Mar 2016 20:30:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 162432038F for ; Tue, 22 Mar 2016 20:30:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 376CD2014A for ; Tue, 22 Mar 2016 20:30:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSur-0004sN-95; Tue, 22 Mar 2016 20:28:37 +0000 Received: from mail-io0-x22e.google.com ([2607:f8b0:4001:c06::22e]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSqh-00089w-RI for linux-arm-kernel@lists.infradead.org; Tue, 22 Mar 2016 20:24:22 +0000 Received: by mail-io0-x22e.google.com with SMTP id 124so103068292iov.3 for ; Tue, 22 Mar 2016 13:23:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wHQ350uYbwXR2HN0aHjRhTE0mrDN22TyM41LzajCBu8=; b=j9acngi/ydiX/okzmFjRQvs82xKaqzsmyAlr9YfhHk7z7eOj6xri28pKXgJ3iHaxtG EUB0il5OijQ/ep1/Hj4H/ALf4i51XVmaCdDWmuUpjWgJquWjLOzM9KfI5YbpHjJQJE56 in6zlXOckI84FYDoqKTFVYs1E9Tz6hKNMq5RQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wHQ350uYbwXR2HN0aHjRhTE0mrDN22TyM41LzajCBu8=; b=bCvtdPTOH8QQQvDi1G1KMg+M1gTSoqwsyLA53bhRHu5FypS/VPOXHyOeuUdht9/ne2 fj4uBSePTRJxKZdIglUqugIV8LcUbINrp4p5MMhA9hax8Ue9nQzdRfOk9Y/jOtCryBip +wqxprk/I0z4nUJF2s6ryf3dYEm1gVRtr3r1ZZyrh3PXnI/vwR84tTN19bwxL52RrmI+ qB5s/QZBeStCDfLSzPdKrB8rtiCuQXB0/pRO8yy7ie2PPQFMJqUH/cDRGJaLQc0w4Uat 5bkFBA+SETfuYHas0bkw1kOSIpgYa/Cphkil/GNWZ+YGGj7Qusx2Es/LCHfBIZUwiNhb tSeA== X-Gm-Message-State: AD7BkJL7Vehn61HMTtja9cHKppy39cjeQC407KmUhvsxz4QvXDyhjjtVAt+VjpudKGCneB+m X-Received: by 10.107.2.69 with SMTP id 66mr42282568ioc.8.1458678238906; Tue, 22 Mar 2016 13:23:58 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xo2sm8092061igb.0.2016.03.22.13.23.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Mar 2016 13:23:57 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 11/14] coresight: tmc: keep track of memory width Date: Tue, 22 Mar 2016 14:23:19 -0600 Message-Id: <1458678202-3447-12-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> References: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160322_132420_146651_186B134E X-CRM114-Status: GOOD ( 14.47 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Accessing the HW configuration register each time the memory width is needed simply doesn't make sense. It is much more efficient to read the value once and keep a reference for later use. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 8 +++----- drivers/hwtracing/coresight/coresight-tmc.c | 1 + drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index c533b4494969..2cad1aa1949f 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -42,18 +42,16 @@ void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) { - enum tmc_mem_intf_width memwidth; u8 memwords; char *bufp; u32 read_data; int i; - memwidth = BMVAL(readl_relaxed(drvdata->base + CORESIGHT_DEVID), 8, 10); - if (memwidth == TMC_MEM_INTF_WIDTH_32BITS) + if (drvdata->memwidth == TMC_MEM_INTF_WIDTH_32BITS) memwords = 1; - else if (memwidth == TMC_MEM_INTF_WIDTH_64BITS) + else if (drvdata->memwidth == TMC_MEM_INTF_WIDTH_64BITS) memwords = 2; - else if (memwidth == TMC_MEM_INTF_WIDTH_128BITS) + else if (drvdata->memwidth == TMC_MEM_INTF_WIDTH_128BITS) memwords = 4; else memwords = 8; diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index c614fe160f8a..beeac81ff2fe 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -304,6 +304,7 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id) devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID); drvdata->config_type = BMVAL(devid, 6, 7); + drvdata->memwidth = BMVAL(devid, 8, 10); if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { if (np) diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 6dbd70861b17..a6fb7a9fec5a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -103,6 +103,7 @@ enum tmc_mem_intf_width { * @size: @buf size. * @mode: how this TMC is being used. * @config_type: TMC variant, must be of type @tmc_config_type. + * @memwidth: width of the memory interface databus, powers of two. * @trigger_cntr: amount of words to store after a trigger. */ struct tmc_drvdata { @@ -119,6 +120,7 @@ struct tmc_drvdata { u32 size; local_t mode; enum tmc_config_type config_type; + enum tmc_mem_intf_width memwidth; u32 trigger_cntr; };