| Message ID | 1459827858-3871-3-git-send-email-eric@anholt.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Eric, On 05/04/16 04:44, Eric Anholt wrote: > For arm64, the bootloader will instead be implementing the spin-table > enable method. You may also want to add that SMP ops simply do not exist on arm64, hence the bootloader [...]. > > Signed-off-by: Eric Anholt <eric@anholt.net> > --- > drivers/irqchip/irq-bcm2836.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c > index 233ccdd..4ae9f76 100644 > --- a/drivers/irqchip/irq-bcm2836.c > +++ b/drivers/irqchip/irq-bcm2836.c > @@ -223,6 +223,7 @@ static struct notifier_block bcm2836_arm_irqchip_cpu_notifier = { > .priority = 100, > }; > > +#ifdef ARM That should really be CONFIG_ARM. > int __init bcm2836_smp_boot_secondary(unsigned int cpu, > struct task_struct *idle) > { > @@ -238,7 +239,7 @@ int __init bcm2836_smp_boot_secondary(unsigned int cpu, > static const struct smp_operations bcm2836_smp_ops __initconst = { > .smp_boot_secondary = bcm2836_smp_boot_secondary, > }; > - > +#endif > #endif > > static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = { > @@ -256,8 +257,11 @@ bcm2836_arm_irqchip_smp_init(void) > register_cpu_notifier(&bcm2836_arm_irqchip_cpu_notifier); > > set_smp_cross_call(bcm2836_arm_irqchip_send_ipi); > + > +#ifdef ARM > smp_set_ops(&bcm2836_smp_ops); > #endif > +#endif > } > > /* > Thanks, M.
On Tuesday 05 April 2016, Eric Anholt wrote: > For arm64, the bootloader will instead be implementing the spin-table > enable method. > > Signed-off-by: Eric Anholt <eric@anholt.net> > --- > drivers/irqchip/irq-bcm2836.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c > index 233ccdd..4ae9f76 100644 > --- a/drivers/irqchip/irq-bcm2836.c > +++ b/drivers/irqchip/irq-bcm2836.c > @@ -223,6 +223,7 @@ static struct notifier_block bcm2836_arm_irqchip_cpu_notifier = { > .priority = 100, > }; > > +#ifdef ARM > int __init bcm2836_smp_boot_secondary(unsigned int cpu, > struct task_struct *idle) > { > @@ -238,7 +239,7 @@ int __init bcm2836_smp_boot_secondary(unsigned int cpu, > static const struct smp_operations bcm2836_smp_ops __initconst = { > .smp_boot_secondary = bcm2836_smp_boot_secondary, > }; > - > +#endif > #endif > > static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = { > @@ -256,8 +257,11 @@ bcm2836_arm_irqchip_smp_init(void) > register_cpu_notifier(&bcm2836_arm_irqchip_cpu_notifier); > > set_smp_cross_call(bcm2836_arm_irqchip_send_ipi); > + > +#ifdef ARM > smp_set_ops(&bcm2836_smp_ops); > #endif > +#endif > } I'd suggest instead using CPU_METHOD_OF_DECLARE and moving the SMP code to arch/arm/mach-bcm/platsmp-bcm2835.c. It doesn't really belong in the irqchip code. Arnd
Arnd Bergmann <arnd@arndb.de> writes: > On Tuesday 05 April 2016, Eric Anholt wrote: >> For arm64, the bootloader will instead be implementing the spin-table >> enable method. >> >> Signed-off-by: Eric Anholt <eric@anholt.net> >> --- >> drivers/irqchip/irq-bcm2836.c | 6 +++++- >> 1 file changed, 5 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c >> index 233ccdd..4ae9f76 100644 >> --- a/drivers/irqchip/irq-bcm2836.c >> +++ b/drivers/irqchip/irq-bcm2836.c >> @@ -223,6 +223,7 @@ static struct notifier_block bcm2836_arm_irqchip_cpu_notifier = { >> .priority = 100, >> }; >> >> +#ifdef ARM >> int __init bcm2836_smp_boot_secondary(unsigned int cpu, >> struct task_struct *idle) >> { >> @@ -238,7 +239,7 @@ int __init bcm2836_smp_boot_secondary(unsigned int cpu, >> static const struct smp_operations bcm2836_smp_ops __initconst = { >> .smp_boot_secondary = bcm2836_smp_boot_secondary, >> }; >> - >> +#endif >> #endif >> >> static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = { >> @@ -256,8 +257,11 @@ bcm2836_arm_irqchip_smp_init(void) >> register_cpu_notifier(&bcm2836_arm_irqchip_cpu_notifier); >> >> set_smp_cross_call(bcm2836_arm_irqchip_send_ipi); >> + >> +#ifdef ARM >> smp_set_ops(&bcm2836_smp_ops); >> #endif >> +#endif >> } > > I'd suggest instead using CPU_METHOD_OF_DECLARE and moving the SMP code > to arch/arm/mach-bcm/platsmp-bcm2835.c. It doesn't really belong in the > irqchip code. I think because of DT ABI (sigh) we're stuck with the current implementation. FWIW, I had started with the SMP bits in a platsmp.c, but moved it into the irqchip because that was so much simpler than reaching over into the irqchip node to map its registers.
diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c index 233ccdd..4ae9f76 100644 --- a/drivers/irqchip/irq-bcm2836.c +++ b/drivers/irqchip/irq-bcm2836.c @@ -223,6 +223,7 @@ static struct notifier_block bcm2836_arm_irqchip_cpu_notifier = { .priority = 100, }; +#ifdef ARM int __init bcm2836_smp_boot_secondary(unsigned int cpu, struct task_struct *idle) { @@ -238,7 +239,7 @@ int __init bcm2836_smp_boot_secondary(unsigned int cpu, static const struct smp_operations bcm2836_smp_ops __initconst = { .smp_boot_secondary = bcm2836_smp_boot_secondary, }; - +#endif #endif static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = { @@ -256,8 +257,11 @@ bcm2836_arm_irqchip_smp_init(void) register_cpu_notifier(&bcm2836_arm_irqchip_cpu_notifier); set_smp_cross_call(bcm2836_arm_irqchip_send_ipi); + +#ifdef ARM smp_set_ops(&bcm2836_smp_ops); #endif +#endif } /*
For arm64, the bootloader will instead be implementing the spin-table enable method. Signed-off-by: Eric Anholt <eric@anholt.net> --- drivers/irqchip/irq-bcm2836.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)