From patchwork Tue Apr 5 14:49:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fu.wei@linaro.org X-Patchwork-Id: 8752751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8AEFBC0553 for ; Tue, 5 Apr 2016 14:53:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8914A20351 for ; Tue, 5 Apr 2016 14:53:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 778A02027D for ; Tue, 5 Apr 2016 14:53:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1anSJf-0004S2-Tg; Tue, 05 Apr 2016 14:50:51 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1anSJb-0004R8-LT for linux-arm-kernel@lists.infradead.org; Tue, 05 Apr 2016 14:50:49 +0000 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E5E93AC1D3; Tue, 5 Apr 2016 14:50:25 +0000 (UTC) Received: from magi-f22.redhat.com (vpn1-4-12.pek2.redhat.com [10.72.4.12]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u35EoAeS022673; Tue, 5 Apr 2016 10:50:12 -0400 From: fu.wei@linaro.org To: tn@semihalf.com, rjw@rjwysocki.net, len.brown@intel.com, pavel@ucw.cz, catalin.marinas@arm.com, will.deacon@arm.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com Subject: [PATCH v9] acpi, apei, arm64: APEI initial support for aarch64. Date: Tue, 5 Apr 2016 22:49:48 +0800 Message-Id: <1459867788-14678-1-git-send-email-fu.wei@linaro.org> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160405_075047_776638_85852E6F X-CRM114-Status: GOOD ( 16.30 ) X-Spam-Score: -6.3 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, linaro-acpi@lists.linaro.org, tbaicar@codeaurora.org, rruigrok@codeaurora.org, Fu Wei , lorenzo.pieralisi@arm.com, al.stone@linaro.org, x86@kernel.org, harba@qti.qualcomm.com, linux-acpi@vger.kernel.org, msalter@redhat.com, grant.likely@linaro.org, linux-pm@vger.kernel.org, Marc.Zyngier@arm.com, jcm@redhat.com, Tomasz Nowicki , rrichter@cavium.com, linux-arm-kernel@lists.infradead.org, graeme.gregory@linaro.org, linux-kernel@vger.kernel.org, jarkko.nikula@linux.intel.com, hanjun.guo@linaro.org, jon.zhixiong.zhang@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Nowicki This commit provides APEI arch-specific bits for aarch64 Meanwhile, (1)add a new subfunction "hest_ia32_init" for "acpi_disable_cmcff" which is used by IA-32 Architecture Corrected Machine Check (CMC). (2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to a generic place. (3)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64, because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64. [Fu Wei: improve && upstream] Signed-off-by: Tomasz Nowicki Tested-by: Jonathan (Zhixiong) Zhang Signed-off-by: Fu Wei Acked-by: Hanjun Guo Tested-by: Tyler Baicar Acked-by: Will Deacon --- Changelog: v9: Improve the comment for arch_apei_flush_tlb_one. Using select "HAVE_ACPI_APEI if (ACPI && EFI)" to fix the EFI dependence problem. v8: https://lkml.org/lkml/2016/3/29/132 Fix a "undefined reference" bug by selecting EFI when ACPI_APEI is set on ARM64. v7: https://lkml.org/lkml/2016/3/17/183 Add comment for arch_apei_flush_tlb_one in arch/arm64/include/asm/acpi.h v6: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006644.html Move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to a generic place. Delete HAVE_ACPI_APEI_HEST_IA32. v5: https://lkml.org/lkml/2015/12/10/131 Add "HAVE_ACPI_APEI_HEST_IA32" instead of "#if defined(__i386__) || defined(__x86_64__)". v4: https://lkml.org/lkml/2015/12/8/188 Rebase to latest kernel version(4.4-rc4). Move arch_apei_flush_tlb_one into header file as a inline function Add a new subfunction "hest_ia_init" for "acpi_disable_cmcff". v3: https://lkml.org/lkml/2015/12/3/521 Remove "acpi_disable_cmcff" from arm64 code, and wrap it in hest.c by "#if defined(__i386__) || defined(__x86_64__)" v2: https://lkml.org/lkml/2015/12/2/432 Rebase to latest kernel version(4.4-rc3). Move arch_apei_flush_tlb_one() to arch/arm64/kernel/acpi.c v1: https://lkml.org/lkml/2015/8/14/199 Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h. Delete arch/arm64/kernel/apei.c. Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff". arch/arm64/Kconfig | 1 + arch/arm64/include/asm/acpi.h | 15 ++++++++++++++- arch/x86/kernel/acpi/apei.c | 3 --- drivers/acpi/apei/hest.c | 18 +++++++++++++++--- 4 files changed, 30 insertions(+), 7 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 4f43622..308fdb1 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -3,6 +3,7 @@ config ARM64 select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI + select HAVE_ACPI_APEI if (ACPI && EFI) select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_ELF_RANDOMIZE diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index aee323b..8db8379 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -17,6 +17,7 @@ #include #include +#include /* Macros for consistency checks of the GICC subtable of MADT */ #define ACPI_MADT_GICC_LENGTH \ @@ -110,7 +111,19 @@ static inline const char *acpi_get_enable_method(int cpu) } #ifdef CONFIG_ACPI_APEI +#define acpi_disable_cmcff 1 pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr); -#endif +/* + * Despite its name, this function must still broadcast the TLB + * invalidation in order to ensure other CPUs don't up with with junk + * entries as a result of speculation. Unusually, its also called in + * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for + * TLB broadcasting, then we're in trouble here. + */ +static inline void arch_apei_flush_tlb_one(unsigned long addr) +{ + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); +} +#endif /* CONFIG_ACPI_APEI */ #endif /*_ASM_ACPI_H*/ diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c index c280df6..ea3046e 100644 --- a/arch/x86/kernel/acpi/apei.c +++ b/arch/x86/kernel/acpi/apei.c @@ -24,9 +24,6 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data) struct acpi_hest_ia_corrected *cmc; struct acpi_hest_ia_error_bank *mc_bank; - if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) - return 0; - cmc = (struct acpi_hest_ia_corrected *)hest_hdr; if (!cmc->enabled) return 0; diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c index 20b3fcf..792a0d9 100644 --- a/drivers/acpi/apei/hest.c +++ b/drivers/acpi/apei/hest.c @@ -123,7 +123,18 @@ EXPORT_SYMBOL_GPL(apei_hest_parse); */ static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data) { - return arch_apei_enable_cmcff(hest_hdr, data); + if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) + return 0; + + if (!acpi_disable_cmcff) + return !arch_apei_enable_cmcff(hest_hdr, data); + + return 0; +} + +static inline int __init hest_ia32_init(void) +{ + return apei_hest_parse(hest_parse_cmc, NULL); } struct ghes_arr { @@ -232,8 +243,9 @@ void __init acpi_hest_init(void) goto err; } - if (!acpi_disable_cmcff) - apei_hest_parse(hest_parse_cmc, NULL); + rc = hest_ia32_init(); + if (rc) + goto err; if (!ghes_disable) { rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);