From patchwork Tue Apr 5 17:53:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 8754161 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 35382C0553 for ; Tue, 5 Apr 2016 17:57:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1373C20390 for ; Tue, 5 Apr 2016 17:57:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0629A20379 for ; Tue, 5 Apr 2016 17:57:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1anVCN-00015U-Nt; Tue, 05 Apr 2016 17:55:31 +0000 Received: from mail-ig0-x230.google.com ([2607:f8b0:4001:c05::230]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1anVBK-0007rh-BL for linux-arm-kernel@lists.infradead.org; Tue, 05 Apr 2016 17:54:46 +0000 Received: by mail-ig0-x230.google.com with SMTP id gy3so60509260igb.0 for ; Tue, 05 Apr 2016 10:54:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TtUi+c4/40vkWdFzzPo6Y9dFXo2wxhscIX/EJN2j2v4=; b=Ch1coMBoEjfQXcsKCAjEHFplPuxPd2BkHO5PhLuDF4XnFQxrxXgbEC3gQ+CIhw/VL3 mNK0OTAvJxgn0pK6KsFTkXpCOWCpYcUo2O1Q1EFh0H0r/dBnRDr2L1YWvUG+HD6FxzTM m9jBd2ej1LccnhXCYMeac+rs8sgx1Rqy6vMI8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TtUi+c4/40vkWdFzzPo6Y9dFXo2wxhscIX/EJN2j2v4=; b=Moe2O2Bi2qe2xwzV8dBubiKdXJw7HZrD6a7uA9vubfEx0RkD/b9TOHuPGrMF8fCRwY 2VCnqYlGQtD+OsstVmeKtZ2xjLr04KvaTmBtElhB5ZurVXvG0pIHwuo0qpqjL9HXdFH+ XUCxETHx9iSB7leMQAGPf6SDC3ZH1euHjzFXu1RFg4ItfP/dcHjRx/9w+w2yQ9qKIdrt TBH1a+3rzSgg9LzKAh7ATFWEnWHve9HFmXckRBd9fjfYSwkK/koeFJa9G6AUjicueLD1 6H5zIzJNHzg3m0uJ8XrUPU1a+TNLkjQsg1QDe+7FZaSDKZbbtJoAu3/W3Ftfeh9jzT+c MMUA== X-Gm-Message-State: AD7BkJLKzrj2y1Tguq9DJ8bXtuuvyxU/8hM4lKJHlzkp3AR3rNOrUrdek2RYLmQgYFCO8t0+ X-Received: by 10.50.160.39 with SMTP id xh7mr16590535igb.64.1459878845578; Tue, 05 Apr 2016 10:54:05 -0700 (PDT) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id n19sm4557012igi.19.2016.04.05.10.54.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Apr 2016 10:54:04 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH 04/11] coresight: etm4x: splitting etmv4 default configuration Date: Tue, 5 Apr 2016 11:53:45 -0600 Message-Id: <1459878832-15219-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1459878832-15219-1-git-send-email-mathieu.poirier@linaro.org> References: <1459878832-15219-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160405_105426_655909_4D56D0C6 X-CRM114-Status: GOOD ( 21.59 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Splitting and updating the default initialisation for each etmv4 configuration so that it can be called at the beginning of each session rather than initialisation time only. Since the trace ID isn't expected to change with every session, moving it with the default tracer initialisation. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm4x.c | 128 ++++++++++++-------------- drivers/hwtracing/coresight/coresight-etm4x.h | 12 +++ 2 files changed, 73 insertions(+), 67 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 102e9aaf952b..2744413dedb2 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -436,14 +437,20 @@ static void etm4_init_arch_data(void *info) CS_LOCK(drvdata->base); } -static void etm4_init_default_data(struct etmv4_drvdata *drvdata) +static void etm4_set_default(struct etmv4_config *config) { - int i; - struct etmv4_config *config = &drvdata->config; + if (WARN_ON_ONCE(!config)) + return; - config->pe_sel = 0x0; - config->cfg = (ETMv4_MODE_CTXID | ETM_MODE_VMID | - ETMv4_MODE_TIMESTAMP | ETM_MODE_RETURNSTACK); + /* + * Make default initialisation trace everything + * + * Select the "always true" resource selector on the + * "Enablign Event" line and configure address range comparator + * '0' to trace all the possible address range. From there + * configure the "include/exclude" engine to include address + * range comparator '0'. + */ /* disable all events tracing */ config->eventctrl0 = 0x0; @@ -452,78 +459,58 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata) /* disable stalling */ config->stall_ctrl = 0x0; + /* enable trace synchronization every 4096 bytes, if available */ + config->syncfreq = 0xC; + /* disable timestamp event */ config->ts_ctrl = 0x0; - /* enable trace synchronization every 4096 bytes for trace */ - if (drvdata->syncpr == false) - config->syncfreq = 0xC; + /* TRCVICTLR::EVENT = 0x01, select the always on logic */ + config->vinst_ctrl |= BIT(0); /* - * enable viewInst to trace everything with start-stop logic in - * started state + * TRCVICTLR::SSSTATUS == 1, the start-stop logic is + * in the started state */ - config->vinst_ctrl |= BIT(0); - /* set initial state of start-stop logic */ - if (drvdata->nr_addr_cmp) - config->vinst_ctrl |= BIT(9); - - /* no address range filtering for ViewInst */ - config->viiectlr = 0x0; - /* no start-stop filtering for ViewInst */ - config->vissctlr = 0x0; - - /* disable seq events */ - for (i = 0; i < drvdata->nrseqstate-1; i++) - config->seq_ctrl[i] = 0x0; - config->seq_rst = 0x0; - config->seq_state = 0x0; - - /* disable external input events */ - config->ext_inp = 0x0; - - for (i = 0; i < drvdata->nr_cntr; i++) { - config->cntrldvr[i] = 0x0; - config->cntr_ctrl[i] = 0x0; - config->cntr_val[i] = 0x0; - } - - /* Resource selector pair 0 is always implemented and reserved */ - config->res_idx = 0x2; - for (i = 2; i < drvdata->nr_resource * 2; i++) - config->res_ctrl[i] = 0x0; + config->vinst_ctrl |= BIT(9); - for (i = 0; i < drvdata->nr_ss_cmp; i++) { - config->ss_ctrl[i] = 0x0; - config->ss_pe_cmp[i] = 0x0; - } - - if (drvdata->nr_addr_cmp >= 1) { - config->addr_val[0] = (unsigned long)_stext; - config->addr_val[1] = (unsigned long)_etext; - config->addr_type[0] = ETM_ADDR_TYPE_RANGE; - config->addr_type[1] = ETM_ADDR_TYPE_RANGE; - } - - for (i = 0; i < drvdata->numcidc; i++) { - config->ctxid_pid[i] = 0x0; - config->ctxid_vpid[i] = 0x0; - } + /* + * Configure address range comparator '0' to encompass all + * possible addresses. + */ - config->ctxid_mask0 = 0x0; - config->ctxid_mask1 = 0x0; + /* First half of default address comparator: start at address 0 */ + config->addr_val[ETM_DEFAULT_ADDR_COMP] = 0x0; + /* trace instruction addresses */ + config->addr_acc[ETM_DEFAULT_ADDR_COMP] &= ~(BIT(0) | BIT(1)); + /* EXLEVEL_NS, bits[12:15], only trace application and kernel space */ + config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= ETM_EXLEVEL_NS_HYP; + /* EXLEVEL_S, bits[11:8], don't trace anything in secure state */ + config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= (ETM_EXLEVEL_S_APP | + ETM_EXLEVEL_S_OS | + ETM_EXLEVEL_S_HYP); + config->addr_type[ETM_DEFAULT_ADDR_COMP] = ETM_ADDR_TYPE_RANGE; - for (i = 0; i < drvdata->numvmidc; i++) - config->vmid_val[i] = 0x0; - config->vmid_mask0 = 0x0; - config->vmid_mask1 = 0x0; + /* + * Second half of default address comparator: go all + * the way to the top. + */ + config->addr_val[ETM_DEFAULT_ADDR_COMP + 1] = ~0x0; + /* trace instruction addresses */ + config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] &= ~(BIT(0) | BIT(1)); + /* Address comparator type must be equal for both halves */ + config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] = + config->addr_acc[ETM_DEFAULT_ADDR_COMP]; + config->addr_type[ETM_DEFAULT_ADDR_COMP + 1] = ETM_ADDR_TYPE_RANGE; /* - * A trace ID value of 0 is invalid, so let's start at some - * random value that fits in 7 bits. ETMv3.x has 0x10 so let's - * start at 0x20. + * Configure the ViewInst function to filter on address range + * comparator '0'. */ - drvdata->trcid = 0x20 + drvdata->cpu; + config->viiectlr = BIT(0); + + /* no start-stop filtering for ViewInst */ + config->vissctlr = 0x0; } static int etm4_cpu_callback(struct notifier_block *nfb, unsigned long action, @@ -568,6 +555,11 @@ static struct notifier_block etm4_cpu_notifier = { .notifier_call = etm4_cpu_callback, }; +static void etm4_init_trace_id(struct etmv4_drvdata *drvdata) +{ + drvdata->trcid = coresight_get_trace_id(drvdata->cpu); +} + static int etm4_probe(struct amba_device *adev, const struct amba_id *id) { int ret; @@ -627,7 +619,9 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) ret = -EINVAL; goto err_arch_supported; } - etm4_init_default_data(drvdata); + + etm4_init_trace_id(drvdata); + etm4_set_default(&drvdata->config); pm_runtime_put(&adev->dev); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 709d96e63910..6ff499bfb2f2 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -178,6 +178,18 @@ #define ETMv4_MODE_ALL 0xFFFFFFF #define TRCSTATR_IDLE_BIT 0 +#define ETM_DEFAULT_ADDR_COMP 0 + +/* secure state access levels */ +#define ETM_EXLEVEL_S_APP BIT(8) +#define ETM_EXLEVEL_S_OS BIT(9) +#define ETM_EXLEVEL_S_NA BIT(10) +#define ETM_EXLEVEL_S_HYP BIT(11) +/* non-secure state access levels */ +#define ETM_EXLEVEL_NS_APP BIT(12) +#define ETM_EXLEVEL_NS_OS BIT(13) +#define ETM_EXLEVEL_NS_HYP BIT(14) +#define ETM_EXLEVEL_NS_NA BIT(15) /** * struct etmv4_config - configuration information related to an ETMv4