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[v2,2/2] clk: bcm2835: Fix PLL poweron

Message ID 1460577903-32192-2-git-send-email-eric@anholt.net (mailing list archive)
State New, archived
Headers show

Commit Message

Eric Anholt April 13, 2016, 8:05 p.m. UTC
In poweroff, we set the reset bit and the power down bit, but only
managed to unset the reset bit for poweron.  This meant that if HDMI
did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
PLLH (that had been on at boot time) and never recover.

Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: stable@vger.kernel.org
---

v2: add fixes tag

 drivers/clk/bcm/clk-bcm2835.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Stephen Boyd April 16, 2016, 12:17 a.m. UTC | #1
On 04/13, Eric Anholt wrote:
> In poweroff, we set the reset bit and the power down bit, but only
> managed to unset the reset bit for poweron.  This meant that if HDMI
> did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
> PLLH (that had been on at boot time) and never recover.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: stable@vger.kernel.org
> ---

Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd April 19, 2016, 9:04 p.m. UTC | #2
On 04/13, Eric Anholt wrote:
> In poweroff, we set the reset bit and the power down bit, but only
> managed to unset the reset bit for poweron.  This meant that if HDMI
> did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
> PLLH (that had been on at boot time) and never recover.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: stable@vger.kernel.org
> ---

Applied to clk-next
diff mbox

Patch

diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 87616ded5bbe..7a7970865c2d 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -554,6 +554,10 @@  static int bcm2835_pll_on(struct clk_hw *hw)
 	const struct bcm2835_pll_data *data = pll->data;
 	ktime_t timeout;
 
+	cprman_write(cprman, data->a2w_ctrl_reg,
+		     cprman_read(cprman, data->a2w_ctrl_reg) &
+		     ~A2W_PLL_CTRL_PWRDN);
+
 	/* Take the PLL out of reset. */
 	cprman_write(cprman, data->cm_ctrl_reg,
 		     cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);