diff mbox

[v7,7/9] clk: mediatek: Enable critical clocks for MT2701

Message ID 1460621514-65191-8-git-send-email-jamesjj.liao@mediatek.com (mailing list archive)
State New, archived
Headers show

Commit Message

James Liao April 14, 2016, 8:11 a.m. UTC
Some system clocks should be turned on by default on MT2701.
This patch enable these clocks when related clocks have
been registered.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
---
 drivers/clk/mediatek/clk-mt2701.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

Comments

Stephen Boyd May 6, 2016, 11:12 p.m. UTC | #1
On 04/14, James Liao wrote:
> Some system clocks should be turned on by default on MT2701.
> This patch enable these clocks when related clocks have
> been registered.
> 
> Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
> ---

critical clks got merged now (sorry I'm slowly getting back to
looking at patches). Please use that flag.
James Liao May 9, 2016, 5:40 a.m. UTC | #2
Hi Stephen,

On Fri, 2016-05-06 at 16:12 -0700, Stephen Boyd wrote:
> On 04/14, James Liao wrote:
> > Some system clocks should be turned on by default on MT2701.
> > This patch enable these clocks when related clocks have
> > been registered.
> > 
> > Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
> > ---
> 
> critical clks got merged now (sorry I'm slowly getting back to
> looking at patches). Please use that flag.

I don't see critical clock support in v4.6-rc7. Is there a repo/branch
that has critical clocks merged?


Best regards,

James
Stephen Boyd May 9, 2016, 10:13 p.m. UTC | #3
On 05/09, James Liao wrote:
> Hi Stephen,
> 
> On Fri, 2016-05-06 at 16:12 -0700, Stephen Boyd wrote:
> > On 04/14, James Liao wrote:
> > > Some system clocks should be turned on by default on MT2701.
> > > This patch enable these clocks when related clocks have
> > > been registered.
> > > 
> > > Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
> > > ---
> > 
> > critical clks got merged now (sorry I'm slowly getting back to
> > looking at patches). Please use that flag.
> 
> I don't see critical clock support in v4.6-rc7. Is there a repo/branch
> that has critical clocks merged?
> 

Right, it's in clk-next in the clk tree.
James Liao May 10, 2016, 2:20 a.m. UTC | #4
On Mon, 2016-05-09 at 15:13 -0700, Stephen Boyd wrote:
> On 05/09, James Liao wrote:
> > Hi Stephen,
> > 
> > On Fri, 2016-05-06 at 16:12 -0700, Stephen Boyd wrote:
> > > On 04/14, James Liao wrote:
> > > > Some system clocks should be turned on by default on MT2701.
> > > > This patch enable these clocks when related clocks have
> > > > been registered.
> > > > 
> > > > Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
> > > > ---
> > > 
> > > critical clks got merged now (sorry I'm slowly getting back to
> > > looking at patches). Please use that flag.
> > 
> > I don't see critical clock support in v4.6-rc7. Is there a repo/branch
> > that has critical clocks merged?
> > 
> 
> Right, it's in clk-next in the clk tree.

I got it. I'll try to use the new critical clock support.


Best regards,

James
diff mbox

Patch

diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index 9542e47..90294e7 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -671,6 +671,21 @@  static const struct mtk_gate top_clks[] __initconst = {
 		28),
 };
 
+static struct clk_onecell_data *top_clk_data __initdata;
+static struct clk_onecell_data *pll_clk_data __initdata;
+
+static void __init mtk_clk_enable_critical(void)
+{
+	if (!top_clk_data || !pll_clk_data)
+		return;
+
+	clk_prepare_enable(pll_clk_data->clks[CLK_APMIXED_ARMPLL]);
+	clk_prepare_enable(top_clk_data->clks[CLK_TOP_AXI_SEL]);
+	clk_prepare_enable(top_clk_data->clks[CLK_TOP_MEM_SEL]);
+	clk_prepare_enable(top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]);
+	clk_prepare_enable(top_clk_data->clks[CLK_TOP_RTC_SEL]);
+}
+
 static void __init mtk_topckgen_init(struct device_node *node)
 {
 	struct clk_onecell_data *clk_data;
@@ -683,7 +698,7 @@  static void __init mtk_topckgen_init(struct device_node *node)
 		return;
 	}
 
-	clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
+	top_clk_data = clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
 
 	mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
 								clk_data);
@@ -704,6 +719,8 @@  static void __init mtk_topckgen_init(struct device_node *node)
 	if (r)
 		pr_err("%s(): could not register clock provider: %d\n",
 			__func__, r);
+
+	mtk_clk_enable_critical();
 }
 CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt2701-topckgen", mtk_topckgen_init);
 
@@ -1297,7 +1314,7 @@  static void __init mtk_apmixedsys_init(struct device_node *node)
 	struct clk_onecell_data *clk_data;
 	int r;
 
-	clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR);
+	pll_clk_data = clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR);
 	if (!clk_data)
 		return;
 
@@ -1308,6 +1325,8 @@  static void __init mtk_apmixedsys_init(struct device_node *node)
 	if (r)
 		pr_err("%s(): could not register clock provider: %d\n",
 			__func__, r);
+
+	mtk_clk_enable_critical();
 }
 CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt2701-apmixedsys",
 							mtk_apmixedsys_init);