From patchwork Tue Apr 19 11:10:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nava kishore Manne X-Patchwork-Id: 8878871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CD1929F1D3 for ; Tue, 19 Apr 2016 11:13:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B77F420274 for ; Tue, 19 Apr 2016 11:13:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B7CD42026D for ; Tue, 19 Apr 2016 11:13:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1asTZ1-00078U-Ru; Tue, 19 Apr 2016 11:11:27 +0000 Received: from mail-cys01nam02on0053.outbound.protection.outlook.com ([104.47.37.53] helo=NAM02-CY1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1asTYx-0006vg-SF for linux-arm-kernel@lists.infradead.org; Tue, 19 Apr 2016 11:11:25 +0000 Received: from CY1NAM02FT050.eop-nam02.prod.protection.outlook.com (10.152.74.53) by CY1NAM02HT092.eop-nam02.prod.protection.outlook.com (10.152.75.81) with Microsoft SMTP Server (TLS) id 15.1.472.8; Tue, 19 Apr 2016 11:11:00 +0000 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; Received: from xsj-pvapsmtpgw01 (149.199.60.83) by CY1NAM02FT050.mail.protection.outlook.com (10.152.75.65) with Microsoft SMTP Server (TLS) id 15.1.472.8 via Frontend Transport; Tue, 19 Apr 2016 11:10:59 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.63) (envelope-from ) id 1asTYY-0004p3-9c; Tue, 19 Apr 2016 04:10:58 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1asTYY-0002Y2-6G; Tue, 19 Apr 2016 04:10:58 -0700 Received: from xsj-pvapsmtp01 (mailhub.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id u3JBArnK011815; Tue, 19 Apr 2016 04:10:53 -0700 Received: from [172.23.64.207] (helo=xhd-lin64re117.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1asTYT-0002Ww-Dm; Tue, 19 Apr 2016 04:10:53 -0700 Received: by xhd-lin64re117.xilinx.com (Postfix, from userid 26085) id 88C0620906; Tue, 19 Apr 2016 16:40:52 +0530 (IST) From: Nava kishore Manne To: , , , , , , , , , , , Subject: [PATCH v2] Axi-usb: Add support for 64-bit addressing. Date: Tue, 19 Apr 2016 16:40:48 +0530 Message-ID: <1461064248-31288-1-git-send-email-navam@xilinx.com> X-Mailer: git-send-email 2.1.2 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22270.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(229853001)(63266004)(36756003)(33646002)(92566002)(106466001)(5008740100001)(11100500001)(4001450100002)(4326007)(5003940100001)(90966002)(81166005)(45336002)(2906002)(48376002)(19580395003)(46386002)(5001770100001)(1096002)(47776003)(189998001)(87936001)(103686003)(52956003)(19580405001)(50986999)(575784001)(36386004)(6806005)(2201001)(586003)(42186005)(50226001)(50466002)(86362001)(1220700001)(107986001)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:CY1NAM02HT092; H:xsj-pvapsmtpgw01; FPR:; SPF:Pass; MLV:sfv; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 98af972e-326b-4eee-fe1a-08d368434998 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(8251501002); SRVR:CY1NAM02HT092; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(9101521026)(601004)(2401047)(13018025)(13017025)(13023025)(13015025)(13024025)(8121501046)(5005006)(3002001)(10201501046); SRVR:CY1NAM02HT092; BCL:0; PCL:0; RULEID:; SRVR:CY1NAM02HT092; X-Forefront-PRVS: 0917DFAC67 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Apr 2016 11:10:59.0108 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT092 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160419_041124_034143_47023E34 X-CRM114-Status: GOOD ( 17.66 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch updates the driver to support 64-bit DMA addressing. Signed-off-by: Nava kishore Manne --- Changes for v2: -Added dma-ranges property in device tree as suggested by Arnd Bergmann. -Modified the driver code based on the xlnx,addrwidth. .../devicetree/bindings/usb/udc-xilinx.txt | 5 ++- drivers/usb/gadget/udc/udc-xilinx.c | 39 ++++++++++++++++++++-- 2 files changed, 40 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/udc-xilinx.txt b/Documentation/devicetree/bindings/usb/udc-xilinx.txt index 47b4e39..850d792 100644 --- a/Documentation/devicetree/bindings/usb/udc-xilinx.txt +++ b/Documentation/devicetree/bindings/usb/udc-xilinx.txt @@ -7,12 +7,15 @@ Required properties: - interrupts : Should contain single irq line of USB2 device controller - xlnx,has-builtin-dma : if DMA is included - +- dma-ranges: Should be as the following . +- xlnx,addrwidth : Should be the dma addressing size in bits(ex: 40 bits). Example: axi-usb2-device@42e00000 { compatible = "xlnx,usb2-device-4.00.a"; interrupts = <0x0 0x39 0x1>; reg = <0x42e00000 0x10000>; + dma-ranges = <0x00000000 0x00000000 0x40000000>; xlnx,has-builtin-dma; + xlnx,addrwidth = <0x28>; }; diff --git a/drivers/usb/gadget/udc/udc-xilinx.c b/drivers/usb/gadget/udc/udc-xilinx.c index 1cbb0ac..702ab9e 100644 --- a/drivers/usb/gadget/udc/udc-xilinx.c +++ b/drivers/usb/gadget/udc/udc-xilinx.c @@ -28,6 +28,7 @@ #include #include #include +#include #include /* Register offsets for the USB device.*/ @@ -47,6 +48,15 @@ #define XUSB_DMA_LENGTH_OFFSET 0x0210 /* DMA Length Register */ #define XUSB_DMA_STATUS_OFFSET 0x0214 /* DMA Status Register */ +/* DMA source Address Reg for LSB */ +#define XUSB_DMA_DSAR_ADDR_OFFSET_LSB 0x0308 +/* DMA source Address Reg for MSB */ +#define XUSB_DMA_DSAR_ADDR_OFFSET_MSB 0x030C +/* DMA destination Addr Reg LSB */ +#define XUSB_DMA_DDAR_ADDR_OFFSET_LSB 0x0310 +/* DMA destination Addr Reg MSB */ +#define XUSB_DMA_DDAR_ADDR_OFFSET_MSB 0x0314 + /* Endpoint Configuration Space offsets */ #define XUSB_EP_CFGSTATUS_OFFSET 0x00 /* Endpoint Config Status */ #define XUSB_EP_BUF0COUNT_OFFSET 0x08 /* Buffer 0 Count */ @@ -176,6 +186,7 @@ struct xusb_ep { * @addr: the usb device base address * @lock: instance of spinlock * @dma_enabled: flag indicating whether the dma is included in the system + * @dma_addrwidth:Indicate the DMA address width. * @read_fn: function pointer to read device registers * @write_fn: function pointer to write to device registers */ @@ -193,7 +204,7 @@ struct xusb_udc { void __iomem *addr; spinlock_t lock; bool dma_enabled; - + u32 dma_addrwidth; unsigned int (*read_fn)(void __iomem *); void (*write_fn)(void __iomem *, u32, u32); }; @@ -215,6 +226,17 @@ static const struct usb_endpoint_descriptor config_bulk_out_desc = { }; /** + * xudc_write64 - write 64bit value to device registers + * @addr: base addr of device registers + * @offset: register offset + * @val: data to be written + **/ +static void xudc_write64(void __iomem *addr, u32 offset, u64 val) +{ + lo_hi_writeq(val, addr + offset); +} + +/** * xudc_write32 - little endian write to device registers * @addr: base addr of device registers * @offset: register offset @@ -330,8 +352,13 @@ static int xudc_start_dma(struct xusb_ep *ep, dma_addr_t src, * destination registers and then set the length * into the DMA length register. */ - udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src); - udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst); + if (udc->dma_addrwidth > 32) { + xudc_write64(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET_LSB, src); + xudc_write64(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET_LSB, dst); + } else { + udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src); + udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst); + } udc->write_fn(udc->addr, XUSB_DMA_LENGTH_OFFSET, length); /* @@ -2097,6 +2124,12 @@ static int xudc_probe(struct platform_device *pdev) udc->dma_enabled = of_property_read_bool(np, "xlnx,has-builtin-dma"); + ret = of_property_read_u32(np, "xlnx,addrwidth", &udc->dma_addrwidth); + if (ret < 0) + dev_warn(&pdev->dev, "missing xlnx,addrwidth property\n"); + + /* Set the dma mask bits */ + dma_set_mask(&pdev->dev, DMA_BIT_MASK(udc->dma_addrwidth)); /* Setup gadget structure */ udc->gadget.ops = &xusb_udc_ops; udc->gadget.max_speed = USB_SPEED_HIGH;