From patchwork Thu Apr 21 08:04:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 8896821 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3253B9F39A for ; Thu, 21 Apr 2016 08:06:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3CCF7202EB for ; Thu, 21 Apr 2016 08:06:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4A883202F8 for ; Thu, 21 Apr 2016 08:06:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1at9cB-0004zJ-NN; Thu, 21 Apr 2016 08:05:31 +0000 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1at9bm-0003Zm-7H for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2016 08:05:07 +0000 Received: by mail-pa0-x229.google.com with SMTP id fs9so26862430pac.2 for ; Thu, 21 Apr 2016 01:04:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=xcvXDQUDaV9HpF3eQDuxwtJAkTPUmE4dOLzJDN6SfaA=; b=Vs6mOgaAAGwnfAua/C1RlwPRZXg9K2rmUzS468L5GGDQ3ug7QSC177PSpcKSH8Z3Gc mQe27LNE5NgBHJak/VduS9uYaPxw+MbxHajl0KHC8J0sv0TIbimYtxdqf71+C4CoBQIk AtQm+mS2bYCpF9lCyW+DVkAvlczh5QTSc0Y1Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=xcvXDQUDaV9HpF3eQDuxwtJAkTPUmE4dOLzJDN6SfaA=; b=fWx7lseqp7d+7BVXf5XJ3bT3uiNwl+EP+x79Ks5W5BwDiZYIGqIk0jlrXi/dhAh6qi ySX40v1iaBwwvcoe8ezM1j8E7vRcvmo43rSQa5HQZfqjlNaZOsbgFZuME9DHAnUgzDJi 1bl2S8skHkyOmcPQaK1nfK1jwvUbvhrBaGGBMPIjEHjiRRtT5O1TPVDGDPy785s2atH5 kBOI1bnepTwxtK/HH2fgD5aM0zSgkWAkPA9UTIhBzhbvlme+IqXd4fwId4bUmyYHrITw tjXsp2NLdWENsFgJP6qz8gx0r0xaru2EAZjee915urOdYdyMWOISEqc/6fy70/vMlyrm rSlg== X-Gm-Message-State: AOPr4FWvtuQX2vfvqBmbuyEno8PgFlY5JYc3e7VKgi3XNECXOuExGpL04c97BP2Y0JoiCQ== X-Received: by 10.66.121.197 with SMTP id lm5mr18728709pab.143.1461225885487; Thu, 21 Apr 2016 01:04:45 -0700 (PDT) Received: from icarus.au.ibm.com ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id uw2sm2650897pac.10.2016.04.21.01.04.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 01:04:43 -0700 (PDT) From: Joel Stanley To: linux-arm-kernel@lists.infradead.org, arnd@arndb.de Subject: [PATCH v2 03/11] doc/devicetree: Add Aspeed clock bindings Date: Thu, 21 Apr 2016 17:34:01 +0930 Message-Id: <1461225849-28074-4-git-send-email-joel@jms.id.au> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1461225849-28074-1-git-send-email-joel@jms.id.au> References: <1461225849-28074-1-git-send-email-joel@jms.id.au> In-Reply-To: <1460627269-21721-1-git-send-email-joel@jms.id.au> References: <1460627269-21721-1-git-send-email-joel@jms.id.au> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160421_010506_337850_C5811020 X-CRM114-Status: GOOD ( 13.09 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: benh@kernel.crashing.org, jk@ozlabs.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Joel Stanley --- .../devicetree/bindings/clock/aspeed-clock.txt | 137 +++++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/aspeed-clock.txt diff --git a/Documentation/devicetree/bindings/clock/aspeed-clock.txt b/Documentation/devicetree/bindings/clock/aspeed-clock.txt new file mode 100644 index 000000000000..91bdf34e5473 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/aspeed-clock.txt @@ -0,0 +1,137 @@ +Device Tree Clock bindings for the Aspeed SoCs + +Aspeed SoCs have a fixed frequency input osciallator is used to create the PLL +and APB clocks. We can determine these frequencies by reading registers that +are set according to strapping bits. + +Forth generation boards +----------------------- + +eg, ast2400. + +CLKIN: + - compatible : Must be "fixed-clock" + - #clock-cells : Should be 0 + - clock-frequency: 48e6, 25e6 or 24e6 depending on the input clock + +PLL: + +Required properties: + - compatible : Must be "aspeed,g4-hpll-clock" + - #clock-cells : Should be 0 + - reg : Should contain registers location and length + - clocks : Should contain phandle + clock-specifier for the input clock (clkin) + +Optional properties: + - clock-output-names : Should contain clock name + + +APB: + +Required properties: + - compatible : Must be "aspeed,g4-apb-clock" + - #clock-cells : Should be 0 + - reg : Should contain registers location and length + - clocks : Should contain phandle + clock-specifier for the h-pll + +Optional properties: + - clock-output-names : Should contain clock name + + +For example: + + clk_clkin: clk_clkin { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <48000000>; + }; + + clk_hpll: clk_hpll { + compatible = "aspeed,g4-hpll-clock"; + #clock-cells = <0>; + reg = <0x1e6e2008 0x4>; + }; + + clk_apb: clk_apb@1e6e2008 { + #clock-cells = <0>; + compatible = "aspeed,g4-apb-clock"; + reg = <0x1e6e2008 0x4>; + clocks = <&clk_hpll>; + }; + + + +Fifth generation boards +----------------------- + +eg, ast2500. + +CLKIN: +Required properties: + - compatible : Must be "fixed-clock" + - #clock-cells : Should be 0 + - clock-frequency: 25000000 or 24000000 depending on the input clock + +H-PLL: + +Required properties: + - compatible : Must be "aspeed,g5-hpll-clock" + - #clock-cells : Should be 0 + - reg : Should contain registers location and length + - clocks : Should contain phandle + clock-specifier for the input clock (clkin) + +Optional properties: + - clock-output-names : Should contain clock name + + +AHB: + +Required properties: + - compatible : Must be "aspeed,g5-ahb-clock" + - #clock-cells : Should be 0 + - reg : Should contain registers location and length + - clocks : Should contain phandle + clock-specifier for the the h-pll + +Optional properties: + - clock-output-names : Should contain clock name + +APB: + +Required properties: + - compatible : Must be "aspeed,g4-apb-clock" + - #clock-cells : Should be 0 + - reg : Should contain registers location and length + - clocks : Should contain phandle + clock-specifier for the the h-pll + +Optional properties: + - clock-output-names : Should contain clock name + + +For example: + clk_clkin: clk_clkin@1e6e2070 { + #clock-cells = <0>; + compatible = "aspeed,g5-clkin-clock"; + reg = <0x1e6e2070 0x04>; + }; + + clk_hpll: clk_hpll@1e6e2024 { + #clock-cells = <0>; + compatible = "aspeed,g5-hpll-clock"; + reg = <0x1e6e2024 0x4>; + clocks = <&clk_clkin>; + }; + + clk_ahb: clk_ahb@1e6e2070 { + #clock-cells = <0>; + compatible = "aspeed,g5-ahb-clock"; + reg = <0x1e6e2070 0x4>; + clocks = <&clk_hpll>; + }; + + clk_apb: clk_apb@1e6e2008 { + #clock-cells = <0>; + compatible = "aspeed,g5-apb-clock"; + reg = <0x1e6e2008 0x4>; + clocks = <&clk_hpll>; + }; +