From patchwork Thu Apr 21 08:04:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 8896871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9CA16BF29F for ; Thu, 21 Apr 2016 08:07:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7804A202F8 for ; Thu, 21 Apr 2016 08:07:31 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 811CB202EB for ; Thu, 21 Apr 2016 08:07:30 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1at9cl-0005Vf-Lh; Thu, 21 Apr 2016 08:06:07 +0000 Received: from mail-pf0-x22f.google.com ([2607:f8b0:400e:c00::22f]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1at9c4-0003r2-5s for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2016 08:05:25 +0000 Received: by mail-pf0-x22f.google.com with SMTP id e128so27493599pfe.3 for ; Thu, 21 Apr 2016 01:05:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=co1ms6N1I/ZxdWpcaR/e9vKakE3GcXFw3u/vSu+0lYI=; b=EWbr1PpOL/2AMvPiTFBjAKXLakxnfcwFHPlNRHx6FQNSSW5ENdYvZovyhy1Xqud74a 7MDnTOW8kEfszz3agh6/TNDmnJQ7hOwveF1SJ+CshZg4UDVWkegKFwOdVTWXLHGp6a0/ PgdYrWRpCTRcq4My4zqxz0X45hcvnhzRw0Yhc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=co1ms6N1I/ZxdWpcaR/e9vKakE3GcXFw3u/vSu+0lYI=; b=G9Hb4IdFfr37vRsxDCjJfmCALyeqCG21FCACM+Bb1eJvGodqv6kxtbMI0lyDpmqMRV mRA5skhoQJn+hhsCa47yrVdzdRsrPdpqYbL7EuptN2hy5ZS/EM8hdJcQto2WaA4NU8qT 63uC2ZyBlrreAJ5VQQDVszjBeB0TmJ3fiMzQpo0QbF54kok7ZgAFh+zmkjI5dFuZpRJM AGNQGom7J/acTRt/mB/u9iJCuVFXfPxZ8XOrznmP6cEGwMLUouOunnWZxYUaML+dwWLE WH7EOG1UShhbKGogs0WkKgQuSV4iLYmR68zqfQXob9nRylAZFoVx3zWTcqwTZePur0Q9 dFPw== X-Gm-Message-State: AOPr4FX9mB0RmN2S/5R9CfclZ8ysIItxQyVAAxNxS+RSVQU0en8oHQKIWwkZfZ7S6ITaSQ== X-Received: by 10.98.16.88 with SMTP id y85mr18355859pfi.77.1461225903412; Thu, 21 Apr 2016 01:05:03 -0700 (PDT) Received: from icarus.au.ibm.com ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id uw2sm2650897pac.10.2016.04.21.01.04.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 01:05:02 -0700 (PDT) From: Joel Stanley To: linux-arm-kernel@lists.infradead.org, arnd@arndb.de Subject: [PATCH v2 07/11] clk: Add driver for Aspeed fifth gen SoCs Date: Thu, 21 Apr 2016 17:34:05 +0930 Message-Id: <1461225849-28074-8-git-send-email-joel@jms.id.au> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1461225849-28074-1-git-send-email-joel@jms.id.au> References: <1461225849-28074-1-git-send-email-joel@jms.id.au> In-Reply-To: <1460627269-21721-1-git-send-email-joel@jms.id.au> References: <1460627269-21721-1-git-send-email-joel@jms.id.au> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160421_010524_284387_7CAEAAE2 X-CRM114-Status: GOOD ( 18.69 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: benh@kernel.crashing.org, jk@ozlabs.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Creates fixed clocks from the strapping registers. Signed-off-by: Joel Stanley --- drivers/clk/Makefile | 2 +- drivers/clk/clk-aspeed-g5.c | 189 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 190 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/clk-aspeed-g5.c diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index bd28f6c95aa1..cdd4643e9ee1 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -84,4 +84,4 @@ obj-$(CONFIG_X86) += x86/ obj-$(CONFIG_ARCH_ZX) += zte/ obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_H8300) += h8300/ -obj-$(CONFIG_ARCH_ASPEED) += clk-aspeed-g4.o +obj-$(CONFIG_ARCH_ASPEED) += clk-aspeed-g4.o clk-aspeed-g5.o diff --git a/drivers/clk/clk-aspeed-g5.c b/drivers/clk/clk-aspeed-g5.c new file mode 100644 index 000000000000..812fd9accf30 --- /dev/null +++ b/drivers/clk/clk-aspeed-g5.c @@ -0,0 +1,189 @@ +/* + * Copyright 2016 IBM Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include + +static void __init aspeed_of_clkin_clk_init(struct device_node *node) +{ + struct clk *clk; + void __iomem *base; + int reg, rate; + const char *name = node->name; + + of_property_read_string(node, "clock-output-names", &name); + + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + /* Strap register SCU70 */ + reg = readl(base) & BIT(23); + iounmap(base); + + if (reg) + rate = 25 * 1000 * 1000; + else + rate = 24 * 1000 * 1000; + + clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_clkin_clock, "aspeed,g5-clkin-clock", + aspeed_of_clkin_clk_init); + + +static void __init aspeed_of_hpll_clk_init(struct device_node *node) +{ + struct clk *clk, *clkin_clk; + void __iomem *base; + int reg, rate, clkin; + const char *name = node->name; + const char *parent_name; + + of_property_read_string(node, "clock-output-names", &name); + parent_name = of_clk_get_parent_name(node, 0); + + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + /* H-PLL parameter register SCU24 */ + reg = readl(base); + iounmap(base); + + clkin_clk = of_clk_get(node, 0); + if (IS_ERR(clkin_clk)) { + pr_err("%s: of_clk_get failed\n", node->full_name); + return; + } + + clkin = clk_get_rate(clkin_clk); + + if (reg & BIT(21)) { + rate = 0; + } else if (reg & BIT(20)) { + rate = clkin; + } else { + int p = (reg >> 13) & 0x3f; + int m = (reg >> 5) & 0xff; + int n = reg & 0x1f; + + rate = clkin * ((m + 1) / (n + 1)) / (p + 1); + } + + clk = clk_register_fixed_rate(NULL, name, parent_name, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_hpll_clock, "aspeed,g5-hpll-clock", + aspeed_of_hpll_clk_init); + + +static void __init aspeed_of_ahb_clk_init(struct device_node *node) +{ + struct clk *clk, *hpll_clk; + void __iomem *base; + int reg, rate, hpll; + const char *name = node->name; + const char *parent_name; + + of_property_read_string(node, "clock-output-names", &name); + parent_name = of_clk_get_parent_name(node, 0); + + /* Strap register SCU70 */ + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + reg = (readl(base) >> 9) & 0x03; + iounmap(base); + + /* A value of zero is undefined */ + WARN_ON(reg == 0); + + hpll_clk = of_clk_get(node, 0); + if (IS_ERR(hpll_clk)) { + pr_err("%s: of_clk_get failed\n", node->full_name); + return; + } + + hpll = clk_get_rate(hpll_clk); + + rate = hpll / 2 / (reg + 1); + + clk = clk_register_fixed_rate(NULL, name, parent_name, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_ahb_clock, "aspeed,g5-ahb-clock", + aspeed_of_ahb_clk_init); + + +static void __init aspeed_of_apb_clk_init(struct device_node *node) +{ + struct clk *clk, *hpll_clk; + void __iomem *base; + int reg, rate; + const char *name = node->name; + const char *parent_name; + + of_property_read_string(node, "clock-output-names", &name); + parent_name = of_clk_get_parent_name(node, 0); + + /* Clock selection register SCU08 */ + base = of_iomap(node, 0); + if (!base) { + pr_err("%s: of_iomap failed\n", node->full_name); + return; + } + reg = readl(base) >> 23 & 0x3; + iounmap(base); + + hpll_clk = of_clk_get(node, 0); + if (IS_ERR(hpll_clk)) { + pr_err("%s: of_clk_get failed\n", node->full_name); + return; + } + + rate = clk_get_rate(hpll_clk) / (4 * (reg + 1)); + + clk = clk_register_fixed_rate(NULL, name, parent_name, 0, rate); + if (IS_ERR(clk)) { + pr_err("%s: failed to register clock\n", node->full_name); + return; + } + + clk_register_clkdev(clk, NULL, name); + of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(aspeed_apb_clock, "aspeed,g5-apb-clock", + aspeed_of_apb_clk_init);