From patchwork Tue Apr 26 22:36:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin Cooper X-Patchwork-Id: 8947051 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 70FD3BF29F for ; Tue, 26 Apr 2016 22:38:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 73682201FE for ; Tue, 26 Apr 2016 22:38:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA587201EF for ; Tue, 26 Apr 2016 22:38:51 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1avBbw-0006aD-76; Tue, 26 Apr 2016 22:37:40 +0000 Received: from mail-ob0-f193.google.com ([209.85.214.193]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1avBbb-0006JR-7f for linux-arm-kernel@lists.infradead.org; Tue, 26 Apr 2016 22:37:20 +0000 Received: by mail-ob0-f193.google.com with SMTP id ds1so1859966obc.3 for ; Tue, 26 Apr 2016 15:36:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jEoJNqvdMouqVMQ0eWXfHNCujVBoU4YlWgeG27C4NdE=; b=XQoDxgVcxV4TzjYG0fb4kED7oQREAQ0N5f1vrro4oN48D22X92qLF88W7SQXGXLy5l 0wEPjwIKOW4pJ+aZ+ldEt8yNUmGsAEQticdfpuAXN6/ZBbDe84GJYzXZrVLRssqVPhqg IBdAZ7Z+OqpbKoJH6iN5SGIbJap+MLQnKIEeQT98QMRkt3lT8vuFgl5D576stioxs5bN kabWaMtBgr/+Lo+BMVvgNgIQqaH4XODrHk+mi2uqCxYiVP5f68AN2rK2SwVJ0EZpQXu7 lFh/klSXGqPsH85lgsZPRF2yGYtqtlehUCBIxVJgjGqQC1bzvv8PB/+/z9f8LD4H4xfS J+lA== X-Gm-Message-State: AOPr4FWaOGCMHUaBznB4nlwi0KhnhNWBTqDimsxOKjhYJxVfZwFVSEHfA3z2rHSFw/xf5A== X-Received: by 10.182.146.37 with SMTP id sz5mr2114602obb.24.1461710218284; Tue, 26 Apr 2016 15:36:58 -0700 (PDT) Received: from beast-server.fios-router.home ([173.64.219.161]) by smtp.gmail.com with ESMTPSA id 5sm405228otw.11.2016.04.26.15.36.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 26 Apr 2016 15:36:57 -0700 (PDT) From: Franklin S Cooper Jr To: thierry.reding@gmail.com, robh+dt@kernel.org, tony@atomide.com, paul@pwsan.com, t-kristo@ti.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, vigneshr@ti.com, nsekhar@ti.com Subject: [PATCH v7 2/9] ARM: dts: am437x: Add missing compatibles to PWM binding documents Date: Tue, 26 Apr 2016 17:36:42 -0500 Message-Id: <1461710209-6563-3-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1461710209-6563-1-git-send-email-fcooper@ti.com> References: <1461710209-6563-1-git-send-email-fcooper@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160426_153719_392124_5381A713 X-CRM114-Status: GOOD ( 13.01 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Franklin S Cooper Jr MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are several SOC specific compatibles for ECAP, EHRPWM and PWMMS that are in use but aren't properly documented. Therefore, fix this by adding the compatibles to the appropriate binding documents. While at it make minor corrections to the binding document. Signed-off-by: Franklin S Cooper Jr Acked-by: Rob Herring --- .../devicetree/bindings/pwm/pwm-tiecap.txt | 12 ++++++++++-- .../devicetree/bindings/pwm/pwm-tiehrpwm.txt | 12 ++++++++++-- .../devicetree/bindings/pwm/pwm-tipwmss.txt | 21 +++++++++++++++++++-- 3 files changed, 39 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt index fb81179..788da6c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt @@ -2,8 +2,9 @@ TI SOC ECAP based APWM controller Required properties: - compatible: Must be "ti,-ecap". - for am33xx - compatible = "ti,am33xx-ecap"; - for da850 - compatible = "ti,da850-ecap", "ti,am33xx-ecap"; + for am33xx - compatible = "ti,am33xx-ecap"; + for am4372 - compatible = "ti,am4372-ecap", "ti,am33xx-ecap"; + for da850 - compatible = "ti,da850-ecap", "ti,am33xx-ecap"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The PWM channel index ranges from 0 to 4. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -22,6 +23,13 @@ ecap0: ecap@0 { /* ECAP on am33xx */ ti,hwmods = "ecap0"; }; +ecap0: ecap@0 { /* ECAP on am4372 */ + compatible = "ti,am4372-ecap", "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48300100 0x80>; + ti,hwmods = "ecap0"; +}; + ecap0: ecap@0 { /* ECAP on da850 */ compatible = "ti,da850-ecap", "ti,am33xx-ecap"; #pwm-cells = <3>; diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt index 9c100b2..99b544f 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt @@ -2,8 +2,9 @@ TI SOC EHRPWM based PWM controller Required properties: - compatible: Must be "ti,-ehrpwm". - for am33xx - compatible = "ti,am33xx-ehrpwm"; - for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; + for am33xx - compatible = "ti,am33xx-ehrpwm"; + for am4372 - compatible = "ti,am4372-ehrpwm", "ti,am33xx-ehrpwm"; + for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -22,6 +23,13 @@ ehrpwm0: ehrpwm@0 { /* EHRPWM on am33xx */ ti,hwmods = "ehrpwm0"; }; +ehrpwm0: ehrpwm@0 { /* EHRPWM on am4372 */ + compatible = "ti,am4372-ehrpwm", "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48300200 0x80>; + ti,hwmods = "ehrpwm0"; +}; + ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */ compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; #pwm-cells = <3>; diff --git a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt index f7eae77..fd8e87c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt @@ -1,7 +1,10 @@ TI SOC based PWM Subsystem Required properties: -- compatible: Must be "ti,am33xx-pwmss"; +- compatible: Must be "ti,-pwmss". + for am33xx - compatible = "ti,am33xx-pwmss"; + for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + - reg: physical base address and size of the registers map. - address-cells: Specify the number of u32 entries needed in child nodes. Should set to 1. @@ -16,7 +19,7 @@ Required properties: Also child nodes should also populated under PWMSS DT node. Example: -pwmss0: pwmss@48300000 { +epwmss0: epwmss@48300000 { /* PWMSS for am33xx */ compatible = "ti,am33xx-pwmss"; reg = <0x48300000 0x10>; ti,hwmods = "epwmss0"; @@ -29,3 +32,17 @@ pwmss0: pwmss@48300000 { /* child nodes go here */ }; + +epwmss0: epwmss@48300000 { /* PWMSS for am4372 */ + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss" + reg = <0x48300000 0x10>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48300100 0x48300100 0x80 /* ECAP */ + 0x48300180 0x48300180 0x80 /* EQEP */ + 0x48300200 0x48300200 0x80>; /* EHRPWM */ + + /* child nodes go here */ +};